Table of Contents
Advertisement
1.4.5 Clock skew management
The internal clock for a device is typically based on a PLL with its own clock
generator and is used when transmitting dwords on the physical link. When
receiving, however, dwords need to be latched based on a clock derived from the
input bit stream itself. Although the input clock is nominally a fixed frequency, it
may differ slightly from the internal clock frequency up to the physical link rate
tolerance. Over time, if the input clock is faster than the internal clock, the device
may receive a dword and not be able to forward it to an internal buffer; this is
called an overrun. If the input clock is slower than the internal clock, the device
may not have a dword when needed in an internal buffer; this is called an
underrun.
To solve this problem, transmitting devices insert ALIGNs or NOTIFYs in the
dword stream.
A phy that is the original source for the dword stream (i.e., a phy that is not an
expander phy forwarding dwords from another expander phy) shall insert one
ALIGN or NOTIFY for clock skew management as described in Table 1.16.
Table 1.16 Clock skew management ALIGN insertion requirement
Physical link rate
1.5 Gbps
3.0 Gbps
In the clock skew management of a drive, one ALIGN primitive is always inserted
every 1024 dwords regardless of the physical link rate.
1.4.6 Idle physical link
In any of the conditions below, when there is no dword to be sent, an idle dword
is sent. This idle dword is scrambled.
1) In an outside connection
2) The SSP or SMP connection is an inside connection.
C141-C013
requirement
One ALIGN or NOTIFY within every 2 048 dwords
Two ALIGNs or NOTIFYs within every 4 096 dwords
1.4 Link layer
57
Advertisement
Table of Contents
