Mirroring Redundancy State; Table 61: Mirroring Redundancy State Sensor Typical Characteristics - Intel S1400FP Manual

Epsd platform based on intel xeon processor e5 4600/2600/2400/1600/1400 product families
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System Event Log Troubleshooting Guide for EPSD Platforms Based on Intel
7.3

Mirroring Redundancy State

Mirroring Mode protects memory data by full redundancy – keeping complete copies of all data on both channels of a Mirroring
Domain (channel pair). If an Uncorrectable Error, which is normally fatal, occurs on one channel of a pair, and the other channel is
still intact and operational, then the Uncorrectable Error is "demoted" to a Correctable Error, and the failed channel is disabled.
Because the Mirror Domain is no longer redundant, a Mirroring Redundancy State SEL Event is logged.
Revision 1.1
Byte
Field
16
Event Data 3
Selected RAS Mode
[7:4] = Reserved
[3:0] = RAS Mode

Table 61: Mirroring Redundancy State Sensor Typical Characteristics

Byte
Field
8
Generator ID
9
11
Sensor Type
12
Sensor Number
13
Event Direction and
Event Type
14
Event Data 1
Intel order number G90620-002
Xeon
Processor E5 4600/2600/2400/1600/1400 Product Families
®
®
Description
0h = None (Independent Channel Mode)
1h = Mirroring Mode
2h = Lockstep Mode
4h = Rank Sparing Mode
Description
0033h = BIOS SMI Handler
0ch = Memory
01h
[7] Event direction
0b = Assertion Event
1b = Deassertion Event
[6:0] Event Type = 0Bh (Generic Discrete)
[7:6] – 10b = OEM code in Event Data 2
[5:4] – 10b = OEM code in Event Data 3
[3:0] – Event Trigger Offset
0h = Fully Redundant
2h = Redundancy Degraded
Memory Subsystem
73

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