Table 3-1. Local Bus Memory Map - Motorola MVME167 Series User Manual

Operating Instructions
3
Address Range
$00000000 - DRAMSIZE
DRAMSIZE - $FF7FFFFF
$FF800000 - $FFBFFFFF
$FFC00000 - $FFDFFFFF
$FFE00000 - $FFE1FFFF
$FFE20000 - $FFEFFFFF
$FFF00000 - $FFFEFFFF
$FFFF0000 - $FFFFFFFF
NOTES:
3-4

Table 3-1. Local Bus Memory Map

Devices Accessed
User Programmable
(Onboard DRAM)
User Programmable
(VMEbus)
ROM
reserved
SRAM
SRAM (repeated)
Local I/O Devices
(Refer to next table)
User Programmable
(VMEbus A16)
1. Onboard EPROM appears at $00000000 - $003FFFFF following a local bus
reset. The EPROM appears at 0 until the ROM0 bit is cleared in the VMEchip2.
The ROM0 bit is located at address $FFF40030 bit 20. The EPROM must be
disabled at 0 before the DRAM is enabled. The VMEchip2 and DRAM map
decoders are disabled by a local bus reset.
2. This area is user-programmable. The suggested use is shown in the table. The
DRAM decoder is programmed in the MEMC040 or MCECC chip, and the
local-to-VMEbus decoders are programmed in the VMEchip2.
3. Size is approximate.
4. Cache inhibit depends on devices in area mapped.
5. This area is not decoded. If these locations are accessed and the local bus timer
is enabled, the cycle times out and is terminated by a TEA signal.
Port Size Size
D32 DRAMSIZE
D32/D16 3GB
D32 4MB
-- 2MB
D32 128KB
D32 896KB
D32-D8 1MB
D32/D16 64KB
MVME167 Single Board Computer User's Manual
Software
Cache Notes
Inhibit
N 1, 2
? 3, 4
N 1
-- 5
N --
N --
Y 3
? 2, 4