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multi-MPU
ations 3-30
MVME167 functional description 4-1
MVME167 main module block diagram
4-11
MVME167 model designations 1-1
MVME167 module installation 2-6
MVME167 specifications 1-4
MVME167 switches, headers, connec-
tors, fuses, and LEDs 2-3
MVME167Bug (see 167Bug and debug
monitor) 1-6, 2-2, 2-6, 3-1, 3-30
MVME167Bug debug monitor 1-6
MVME167Bug debugging package 1-7
MVME712-12 1-5
MVME712-13 1-5
MVME712A 1-5
MVME712AM 1-5
MVME712B 1-5
MVME712M 1-5, 2-6, 2-8
MVME712X 1-6, 2-6, 4-5
N
negation 1-9
Non-Volatile RAM (NVRAM) (see Bat-
tery Backed Up RAM, BBRAM,
and MK48T08) 3-26, 4-4
normal address range 3-3
NVRAM (Non-Volatile RAM) (see Bat-
tery Backed Up RAM, BBRAM,
and MK48T08) 3-26, 4-4
O
onboard DRAM 4-3
operating instructions 3-1
I
operating systems 1-6
N
P
D
P2 adapter board 1-5, 2-7, 2-8
E
parallel port interface 4-6
X
parallel printer port 4-6
IN-4
programming
consider-
parity DRAM mezzanine module block
diagram 4-12
PCCchip2 1-5
PCCchip2 memory map 3-14
printer interface 4-6
printer memory map 3-16
printer port 4-6
programmable hardware interrupts 4-8
programmable tick timers 4-7
proper grounding A-6
R
registers 3-30
default values 3-30
related documentation 1-7
remote status and control J3 4-10
RESET switch S2 3-1, 3-30
RF emissions 1-5
RFI 2-7
ROM cycle times 4-9
RTXC4 (Receive Transmit Clock 4) 2-4
S
S1 3-1
S2 3-1, 3-30
sample configurations A-4
SCC
(Serial
Controller
CD2401) 4-5
SCSI Controller (see 53C710) 4-7
SCSI FIFO buffer 4-9
SCSI ID (see local SCSI ID) 3-28
SCSI interface 4-7
SCSI specification 1-8
SCSI termination 4-7
SCSI terminator power 2-8
SCSI transfers 4-9
Serial
Controller
CD2401) 4-5
serial port 4 2-4
serial port 4 clock configuration select
headers J6 and J7 2-4
serial port interface 4-5
MVME167 Single Board Computer User's Manual
Index
Chip)
(see
Chip
(SCC)
(see
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