Motorola MVME167 Series User Manual page 77

Single board computer
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When using this index, keep in mind that a page number indicates only where
referenced material begins. It may extend to the page or pages following the page
referenced.
Numerics
167Bug
(see
debug
MVME167Bug) 1-6, 2-2, 2-6, 3-1,
3-30
53C710 (see SCSI Controller) 4-7
53C710 SCSI memory map 3-24
82596CA (see Ethernet and LAN) 4-6
82596CA Ethernet LAN memory map
3-23
A
ABORT switch interrupter 3-1
ABORT switch S1 3-1
adapter board (see P2 adapter board) 1-5,
2-7
ambient air temperature 1-3
assembler/disassembler 1-6
assertion 1-9
B
Battery Backed Up RAM (BBRAM) and
Clock
(see
NVRAM) 4-4
battery backup 4-2
battery handling and disposal 4-3
battery lifetime 4-3
BBRAM (see Battery Backed Up RAM,
MK48T08, and NVRAM) 3-26,
4-4
BBRAM configuration area memory map
3-25
BBRAM,TOD Clock memory map 3-26
BG (bus grant) 2-7
MVME167/D3IN-1
monitor
and
MK48T08
and
big endian mode 3-24
binary number 1-9
block diagram
ECC DRAM mezzanine module 4-13
MVME167 main module 4-11
parity DRAM mezzanine module
4-12
board ID 3-27
board serial number 3-27
board speed 3-28
bus error 3-30
bus grant (BG) 2-7
byte 1-9
C
cables (see also shielded cables) 2-7
CD2401 (see SCC and Serial Controller
Chip) 4-5
CFM (cubic feet per minute) 1-3
chassis ground A-6
checksum 3-28
Cirrus Logic CD2401 serial port memory
map 3-19
conductive chassis rails 1-4
configuration area 3-26
controls and indicators 3-1
cooling requirements 1-3
CR2430 4-2
cubic feet per minute (CFM) 1-3
cycle times 4-8
local bus to DRAM 4-8
ROM 4-9
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