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Table 5.
Intel
Itanium
Processor
Stepping
E0
4.15
4.25
1
X
2
X
3
X
4
X
5
X
6
X
7
X
8
X
9
X
10
X
11
X
12
X
13
X
14
X
15
X
16
X
17
X
20
X
21
X
22
X
23
X
24
X
25
X
26
X
®
®
Intel
Itanium
Processor 9300 Series and 9500 Series
Specification Update
®
Processor 9300 Series Errata Summary (Sheet 1 of 3)
PAL Version
4.28
4.29
4.30
4.37
4.39
Status
Configuration Agent Responds With Poison Error
No Fix
To Nonaligned Writes with Poison Set
Hold of Incoming PTC.G Pending During PAL-based
No Fix
IA-32 Execution Can Cause Deadlock
Error During Intel
No Fix
Cause Hang
No Fix
Bbox Violates Message Class Dependency
No Fix
CDEF Memory Region Coherency
Px[n]_CSIWCI Register for Half Link Widths is not
No Fix
Correct After Overwriting
Two Writes Required to Clear CSITTLECR.[Error
No Fix
Overflow]
No Fix
CRC Errors With 16-bit CRC
Reset While In Calibration State Can Cause Hang
®
No Fix
On Intel
Scalable Memory Interconnect (Intel
SMI)
®
Intel
SMI PZ[n]_PBOXFS2.CALIB_DONE Can
No Fix
Only Be Cleared In Reset
Scalable Memory Buffer Must Not Be Reset
No Fix
Directly by FPGA or Other System Logic On Warm
Reset
R_CSR_OPER0.PHYTRAINLIMIT Is Not Asserted
No Fix
When All Clocks Fail
No Fix
Frame Alert Logged After Warm-Logic Reset
Bad Parity In Route Table Can Cause Unexpected
No Fix
Error
No Fix
Lower 2 Bits Of IHA Have Read/Write Behavior
Read or Write of TAD CSRs While System Is Not
No Fix
Quiesced Can Cause Data Corruption
®
After An Intel
No Fix
May Be Observed
Physical Damage To Intel
No Fix
Training To Fail
Northbound Intel
No Fix
Cause South Bound CRCs Resulting In Fast Reset
Loop
CRC Errors Occur on Intel
No Fix
Layer Reset When Scrambling And Periodic
Retraining Are Enabled
No Fix
Transmitter Parameter Values
L2i Fills In 1 Way Of Set When All Other Ways Are
No Fix
Valid And A Way Is Disabled In Set
If A Global Fatal MCA Occurs While A chk.a, chk.s
Or fchkf Is Executing A Logical Processors May Not
No Fix
Enter Machine Check Abort and Min-State Save
Area May Be Invalid
DC Common Mode Clock At Rx Input For
No Fix
®
Intel
SMI and Intel
Errata Title
®
QPI Link Initialization Can
QPI Link Soft Reset CRC Errors
®
SMI Lane Can Cause
®
SMI CRC Persistent Error Can
®
QPI After Physical
®
QPI
November 2012
®
9
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