I/O Ports (P00-P03, P10-P13, P20-P23 And P30-P33); Configuration Of I/O Ports - Epson S1C63558 Technical Manual

4.6 I/O Ports (P00–P03, P10–P13, P20–P23 and P30–P33)

4.6.1 Configuration of I/O ports

The S1C63558 has 16 bits general-purpose I/O ports. Figure 4.6.1.1 shows the configuration of the I/O
port.
The I/O port terminals P10– P13, P30–P33 are shared with the input/output terminals of the serial
interface (1) and (2). The P22 and P23 terminals are shared with the special output (CL, FR) terminals. The
software can select these functions to be used.
At initial reset, these are all set to the I/O port.
Table 4.6.1.1 shows the setting of the input/output terminals by function selection.
Terminal Terminal status
name at initial reset
P00–P03 P00–P03 (Input & Pull-up *)
P10 P10 (Input & Pull-up *)
P11 P11 (Input & Pull-up *)
P12 P12 (Input & Pull-up *)
P13 P13 (Input & Pull-up *)
P20 P20 (Input & Pull-up *)
P21 P21 (Input & Pull-up *)
P22 P22 (Input & Pull-up *)
P23 P23 (Input & Pull-up *)
P30 P30 (Input & Pull-up *)
P31 P31 (Input & Pull-up *)
P32 P32 (Input & Pull-up *)
P33 P33 (Input & Pull-up *)
When "with pull-up resistor" is selected by the mask option (high impedance when "gate direct" is set)
When these ports are used as I/O ports, the ports can be set to either input mode or output mode indi-
vidually (in 1-bit unit). Modes can be set by writing data to the I/O control registers.
Refer to Section 4.11, "Serial Interface", for control of the serial interface.
S1C63558 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (I/O Ports)
Pull-up control
register (PUL)
Address
Address
Data
register
Address
I/O control
register (IOC)
Address
Fig. 4.6.1.1 Configuration of I/O port
Table 4.6.1.1 Function setting of input/output terminals
Special output
CL
P00–P03
P10
P11
P12
P13
P20
P21
CL
P23
P30
P31
P32
P33
Mask option
FR Async.
P00–P03 P00–P03
P10 SIN(I)
P11 SOUT(O)
P12 P12
P13 P13
P20 P20
P21 P21
P22 P22
FR P23
P30 SIN(I)
P31 SOUT(O)
P32 P32
P33 P33
EPSON
V
DD
P
XX
Serial I/F (1), (2)
Clk-sync. Master Clk-sync. Slave
P00–P03 P00–P03
SIN(I) SIN(I)
SOUT(O) SOUT(O)
SCLK(O) SCLK(I)
P13 SRDY(O)
P20 P20
P21 P21
P22 P22
P23 P23
SIN(I) SIN(I)
SOUT(O) SOUT(O)
SCLK(O) SCLK(I)
P33 SRDY(O)
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