Analog Devices MicroConverter ADuC812 User Manual page 53

Parameter
SPI MASTER MODE TIMING (CPHA = 0)
t SCLOCK Low Pulsewidth
SL
t SCLOCK High Pulsewidth
SH
t Data Output Valid after SCLOCK Edge
DAV
t Data Output Setup before SCLOCK Edge
DOSU
t Data Input Setup Time before SCLOCK Edge
DSU
t Data Input Hold Time after SCLOCK Edge
DHD
t Data Output Fall Time
DF
t Data Output Rise Time
DR
t SCLOCK Rise Time
SR
t SCLOCK Fall Time
SF
SCLOCK
(CPOL=0)
SCLOCK
(CPOL=1)
MOSI
MISO
t
t
SH SL
t
DAV
t
t t
DF
DOSU DR
MSB BIT 6 – 1
BIT 6 – 1
MSB IN
t t
DSU DHD
Min Typ Max
330
330
50
150
100
100
10 25
10 25
10 25
10 25
t t
SR SF
LSB
LSB IN
ADuC812
Unit Figure
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