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Analog Devices MicroConverter ADuC824 Quick Reference Manual
Analog Devices MicroConverter ADuC824 Quick Reference Manual

Analog Devices MicroConverter ADuC824 Quick Reference Manual

Analog devices microconverter quick reference guide
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INSTRUCTION SET
Arithmetic Operations
ADD
A,source
1,2
12
Rn
register addressing using R0-R7
add source to A
direct
8bit internal address (00h-FFh)
ADD
A,#data
2
12
@Ri
indirect addressing using R0 or R1
ADDC A,source
1,2
12
add with carry
source
any of [Rn, direct, @Ri]
ADDC A,#data
2
12
dest
any of [Rn, direct, @Ri]
SUBB A,source
subtract from A 1,2
12
#data
8bit constant included in instruction
with borrow
SUBB A,#data
2
12
#data16 16bit constant included in instruction
INC
A
1
12
bit
8bit direct address of bit
INC
source
increment
1,2
12
rel
signed 8bit offset
addr11
11bit address in current 2K page
INC
DPTR
*
1
24
addr16
16bit address
DEC
A
1
12
decrement
DEC
source
1,2
12
*
INC DPTR increments the 24bit value DPP/DPH/DPL
MUL
AB
multiply A by B
1
48
Logical Operations
DIV
AB
divide A by B
1
48
ANL
A,source
DA
A
decimal adjust
1
12
ANL
A,#data
Data Transfer Operations
ANL
direct,A
MOV
A,source
1,2
12
ANL
direct,#data
MOV
A,#data
2
12
ORL
A,source
MOV
dest,A
move source
1,2
12
ORL
A,#data
to destination
MOV
dest,source
1,2,3 24
ORL
direct,A
MOV
dest,#data
2,3 12,24
ORL
direct,#data
MOV DPTR,#data16
3
24
XRL
A,source
MOVC A,@A+DPTR move from
1
24
XRL
A,#data
code memory
MOVC A,@A+PC
1
24
XRL
direct,A
MOVX A,@Ri
1
24
XRL
direct,#data
MOVX A,@DPTR
move to/from
1
24
CLR
A
data memory
MOVX @Ri,A
1
24
CPL
A
MOVX @DPTR,A
1
24
RL
A
PUSH direct
push onto stack
2
24
RLC
A
POP
direct
pop from stack
2
24
RR
A
XCH
A,source
exchange bytes 1,2
12
RRC
A
XCHD A,@Ri
exchg low digits
1
12
SWAP A
Program Branching
Boolean Variable Manipulation
ACALL addr11
2
24
CLR
C
call subroutine
LCALL addr16
3
24
CLR
bit
RET
return from sub.
1
24
SETB C
RETI
return from int.
1
24
SETB bit
AJMP addr11
2
24
CPL
C
LJMP addr16
3
24
CPL
bit
jump
SJMP rel
2
24
ANL
C,bit
JMP
@A+DPTR
1
24
ANL
C,/bit
JZ
rel
jump if A = 0
2
24
ORL
C,bit
JNZ
rel
jump if A not 0
2
24
ORL
C,/bit
CJNE A,direct,rel
3
24
MOV
C,bit
CJNE A,#data,rel
compare and
3
24
MOV
bit,C
jump if not
CJNE Rn,#data,rel
equal
3
24
JC
rel
CJNE @Ri,#data,rel
3
24
JNC
rel
DJNZ Rn,rel
decrement and
2
24
JB
bit,rel
jump if not zero
DJNZ direct, rel
3
24
JNB
bit,rel
NOP
no operation
1
12
JBC
bit, rel
ASSEMBLER DIRECTIVES
EQU
define symbol
DW
store word values in program memory
DATA
define internal memory symbol
ORG
set segment location counter
IDATA
define indirect addressing symbol
END
end of assembly source file
XDATA
define external memory symbol
CSEG
select program memory space
BIT
define internal bit memory symbol
XSEG
select external data memory space
CODE
define program memory symbol
DSEG
select internal data memory space
DS
reserve bytes of data memory
ISEG
select indirectly addressed internal
DBIT
reserve bits of bit memory
data memory space
DB
store byte values in program memory
BSEG
select bit addressable memory space
1
56
P1.0 / T2
Legend
2
1
P1.1 / T2EX
3
2
P1.2 / I
1 / DAC
EXC
4
3
P1.3 / I
2 / AIN5
EXC
5
4,5
AV
DD
6 6,7,8 AGND
7
9
REFIN-
8
10
REFIN+
9
11
P1.4 / AIN1
10
12
P1.5 / AIN2
11
13
P1.6 / AIN3
12
14
P1.7 / AIN4 / DAC
13
15
SS
14
16
MISO
1,2
12
15
17
RESET
2
12
logical AND
16
18
P3.0 / RxD
2
12
17
19
P3.1 / TxD
3
24
18
20
P3.2 / INT0
1,2
12
19
21
P3.3 / INT1
2
12
logical OR
20
22
DV
DD
2
12
21
23
DGND
3
24
22
24
P3.4 / T0
1,2
12
23
25
P3.5 / T1
2
12
logical XOR
24
26
P3.6 / WR
2
12
25
27
P3.7 / RD
3
24
26
28
SCLOCK / D0
clear A to zero
1
12
complement A
1
12
rotate A left
1
12
PROGRAM MEMORY SPACE (read only)
...through C
1
12
rotate A right
1
12
...through C
1
12
swap nibbles
1
12
1
12
clear bit to zero
2
12
1
12
set bit to one
2
12
1
12
complement bit
2
12
AND bit with C
2
24
1FFFh
...NOTbit with C
2
24
OR bit with C
2
24
...NOTbit with C
2
24
0000h
2
12
move bit to bit
2
24
jump if C set
2
24
INTERRUPT VECTOR ADDRESSES
jmp if C not set
2
24
jump if bit set
3
24
Interrupt
jmp if bit not set
3
24
Bit
jmp&clear if set
3
24
PSMCON.5
WDS
IE0
RDY0/RDY1
TF0
IE1
TF1
ISPI
RI/TI
TF2/EXF2
TIMECON.2
PIN FUNCTIONS
1
42
pin 1 identifier
pin 1 identifier
1
2
41
2
3
40
4
39
3
ADuC824
5
38
4
ADuC824
6
37
56pin CSP
7
36
5
8
35
TOP VIEW
6
52pin PQFP
9
34
10
(not to scale)
33
7
11
32
TOP VIEW
8
12
31
9
13
30
(not to scale)
14
29
10
11
12
13
27
29
MOSI / D1
40
43
EA
28
30
P2.0 / A8 / A16
41
44
PSEN
29
31
P2.1 / A9 / A17
42
45
ALE
30
32
P2.2 / A10 / A18
43
46
P0.0 / AD0
31
33
P2.3 / A11 / A19
44
47
P0.1 / AD1
32
34
XTAL1 (in)
45
48
P0.2 / AD2
33
35
XTAL2 (out)
46
49
P0.3 / AD3
34
36
DV
47
50
DGND
DD
35 37,38 DGND
48
51
DV
DD
36
39
P2.4 / A12 / A20
49
52
P0.4 / AD4
37
40
P2.5 / A13 / A21
50
53
P0.5 / AD5
38
41
P2.6 / A14 / A22
51
54
P0.6 / AD6
39
42
P2.7 / A15 / A23
52
55
P0.7 / AD7
FFFFh
external
program
memory
64K bytes
addressable
2000h
EA=1
EA=0
internal
external
8K bytes
Flash/EE
Priority
Vector
within
Interrupt Name
Address
Level
Power Supply Monitor Interrupt
43h
WatchDog Timer Interrupt
5Bh
External Interrupt 0
03h
End of ADC Conversion Interrupt
33h
Timer0 Overflow Interrupt
0Bh
External Interrupt 1
13h
Timer1 Overflow Interrupt
1Bh
SPI Interrupt
3Bh
UART Interrupt
23h
Timer2 Interrupt
2Bh
10
Time Interval Counter Interrupt
53h
11
39
38
37
36
MicroConverter
35
34
33
32
Quick Reference Guide
31
30
29
28
27
a "Data Acquisition System on a Chip"
the ADuC824 is:
ADC:
DAC:
EEPROM:
microcontroller:
other on-chip features:
FUNCTIONAL BLOCK DIAGRAM
(primary ADC)
AIN1
9
AIN2
10
AIN
BUF
PGA
MUX
(auxillary ADC)
AIN3
11
AIN4
12
16 bit
AIN
ADC
MUX
AIN5
4
TEMP
bandgap
sensor
reference
(256 counts
o
per
C)
REFIN+
8
V
REF
detect
REFIN-
7
1
2
200µA / 400µA
3
I
1
3
asynchronous
EXC
4
I
2
4
EXC
5
6
7
8
9
www.analog.com/microconverter
ADuC824
®
24bit
with programmable gain,
plus 16bit
auxiliary ADC
12bit, 15µs, voltage output, rail-to-rail
<1LSB DNL
8K bytes Flash/EE program memory
640 bytes Flash/EE data memory
industry standard 8052
32 I/O lines, programmable PLL clock
(98KHz to 12MHz from 32KHz crystal)
calibrated temperature sensor, power supply
monitor, watchdog timer, flexible serial
interface ports, voltage reference, time interval
counter
ADuC824
ADC
24 bit
control
ADC
&
calibration
DAC
ADC
DAC
3
DAC
BUF
control
control
&
calibration
640 x 8
256 x 8
data
user RAM
22
T0
Flash/EE
16bit
23
T1
counter
1
T2
8052
timers
watchdog
8K x 8
2
T2EX
timer
program
MCU
Flash/EE
core
power supply
monitor
time
downloader
18
18
INT0
INT0
interval
debugger
counter
19
19
INT1
INT1
synchronous
26
D0
serial port
serial interface
OSC &
UART
(
SPI
)
PLL
(
)
27
D1
REV. A

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Summary of Contents for Analog Devices MicroConverter ADuC824

  • Page 1 INSTRUCTION SET Arithmetic Operations Legend A,source register addressing using R0-R7 add source to A direct 8bit internal address (00h-FFh) A,#data indirect addressing using R0 or R1 ADDC A,source add with carry source any of [Rn, direct, @Ri] ADDC A,#data dest any of [Rn, direct, @Ri] SUBB A,source subtract from A 1,2...
  • Page 2 DATA MEMORY: RAM, SFRs, user Flash/EE (all read/write) LOWER RAM General Purpose Area (bit addresses) Bit Addressable Area DATA MEMORY SPACE Register Bank 3 (read/write area) FFFFFFh ( page 159 ) 640 bytes (160 pages) Register data Bank 2 Flash/EE (accessible through SFRs)