Table 28. Mrc Progress Codes; Table 29. Mrc Fatal Error Codes - Intel MFSYS25V2 Specification

Appendix B: POST Code Diagnostic LED Decoder
The MRC Progress Codes are displays to the Diagnostic LEDs that show the execution point in
the MRC operational path at each step.
Checkpoint Upper Nibble
MSB
8h 4h
LED #7 #6
MRC Progress Codes
B0h
1 0
B1h 1 0
B2h 1 0
B3h 1 0
B4h 1 0
B5h 1 0
B6h 1 0
B7h 1 0
B8h 1 0
B9h 1 0
BAh 1 0
BBh 1 0
BCh 1 0
BFh 1 0
Memory Initialization at the beginning of POST includes multiple functions, including: discovery,
channel training, validation that the DIMM population is acceptable and functional, initialization
of the IMC and other hardware settings, and initialization of applicable RAS configurations.
When a major memory initialization error occurs and prevents the system from booting with data
integrity, a beep code is generated, the MRC will display a fatal error code on the diagnostic
LEDs, and a system halt command is executed. Fatal MRC error halts do NOT change the state
of the System Status LED, and they do NOT get logged as SEL events. The following table lists
all MRC fatal errors that are displayed to the Diagnostic LEDs.
Diagnostic LED Decoder
1 = LED On, 0 = LED Off
Upper Nibble
Checkpoint
MSB
8h 4h 2h
LED #7 #6 #5
MRC Fatal Error Codes
E8h
1 1 1
E9h
1 1 1
EAh 1 1 1
48

Table 28. MRC Progress Codes

Diagnostic LED Decoder
1 = LED On, 0 = LED Off
Lower Nibble
2h 1h 8h 4h 2h
#5 #4 #3 #2 #1
1 1 0 0 0
1 1 0 0 0
1 1 0 0 1
1 1 0 0 1
1 1 0 1 0
1 1 0 1 0
1 1 0 1 1
1 1 0 1 1
1 1 1 0 0
1 1 1 0 0
1 1 1 0 1
1 1 1 0 1
1 1 1 1 0
1 1 1 1 1

Table 29. MRC Fatal Error Codes

Lower Nibble
LSB
1h 8h 4h 2h
#4 #3 #2 #1
0 1 0 0
0 1 0 0
0 1 0 1
Intel Confidential
Intel order number: G51989-002
Intel
LSB
1h
#0
0
Detect DIMM population
1 Set DDR3 frequency
0 Gather remaining SPD data
1 Program registers on the memory controller level
0 Evaluate RAS modes and save rank information
1 Program registers on the channel level
0 Perform the JEDEC defined initialization sequence
1 Train DDR3 ranks
0 Initialize CLTT/OLTT
1 Hardware memory test and init
0 Execute software memory init
1 Program memory map and interleaving
0 Program RAS configuration
1 MRC is done
1h
#0
No usable memory error
0
Memory is locked by Intel
1
inaccessible
0 DDR3 channel training error
Compute Module MFS2600KI TPS
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