Control Data Corporation CYBER 180 810 Maintenance And Parts Manual page 91

Register
Bounds
Corrected Error Log
Uncorrected
Error Log
1
Uncorrected
Error Log
2
0-2
3-31
32-47
48-63
0
1
2-4,7
5,6
8-28
29-31
32-39
40-63
0
1
2
3
4
5,6
7
8-28
29-31
32-35
36-42
43
44
45
46-49
50-53
54
55
56-63
0
1
2
3
4
5,6
8-28
29-31
32-39
7,40-63
Description
Bit Vectors that designate ports CPU-0,
IOU, CPU-1 respectively
Not used (zero)
Upper bounds
*
Lower bounds
*
Valid single bit error
Unlogged single bit error
Not used (zero)
Port Code 0, 1
Address bits 40-60 of correctable error
Parity bits 5-7 of address bits 40-60
Syndrome bits 0-7
Not used (zero)
Valid error
Unlogged error
Illegal function
Address bounds fault
Second pass error (PW error)
Port codes 0,
1 ·
Refresh port
Address bits 40-60 of uncorrectable error
Parity Bits 5-7 of address bits 40-60
Write data PE PAK 1-4
Not used
Tag in PE
Function PE
Mark PE
Address PE 4-7
Function code 0-3.
Function code Parity
MARK parity
Mark bits 0-7
Valid error
Unlogged uncorrectable error
Memory data out PE
SECDED double bit error
Tag out PE
Port code 0,
1
Address bits 40-60 of uncorrectable error
Parity bits 5-7 of address bits 40-60
Memory data out PE 0-7
Not used
*
The upper three bits of upper and lower bounds are not used. The lower 13
bits of upper and lower bounds represent bits 39 through 51 of the real memory
address.
60469500 A
5-15