MAINTENANCE REGISTERS
5
==========================================================================~=~==
Maintenance registers contain infot1llation and control functions which are
useful to the customer engineer in both preventive and corrective maintenance.
This section gives the addresses and bit definition of these registers.
IOU MAINTENANCE REGISTERS
The IOU maintenance registers can be displayed through the deadstart display
keyboard command MR.
However, this display is potentially destructive to a
running system; use it only when the system is hung or otherwise idled.
Table
5-i
lists the IOU maintenance registers.
TABLE 5-1.
IOU MAINTENANCE REGISTERS
Direct MAC
Number
I
Address
I
Type
Register
Read/Write
of By:tes
I
~Hex}
I
~Octal}
I
Code
I
I
I
Status Summary
Read
1
I
00
I
000
I
0
Element ID
Read
4
I
10
I
020
I
0
Options Installed
Read
6
I
12
I
022
I
0
Fault Status Mask
Read/Write
8
I
18
I
030
I
0
OS Bounds
Read/Write
8
I
21
I
041
I
0
Environment Control
Read/Write
4
I
30
I
060
I
0
Status
Read·
4
I
40
I
100
I
0
Fault Status
1
Read/Write
8
I
80
I
200
I
0
Fault Status
2
Read/Write
4
I
81
I
201
I
0
Test Mode
Read/Write
2
I
AO
I
240
I
0
Bit assignments are listed on the following pages in the order they appear in
table 5-1.
IOU MAINTENANCE REGISTER BIT ASSIGNMENTS
Register
Status Summary
60469500 A
Byte Number
Bit Number
7
56-58
59
60
61
62
63
Description
N/A
Summary Status
Processor Halt
Uncorrected Error
N/A
Physical Environment Monitor
5-1
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