Register
Processor ID
Options Installed
Environment Control
Control Store
Address
*
Control Store
Breakpoint
**
Byte Number
7
3
6
7
0-6
6,7
0-6
6,7
Bit Number
56-62
63
27
28
29
30
31
5
6
20
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
0-50
51-63
0-50
51-63
Description
Zero
Wired in logic:
0 for single CPU
1
for two CPUs
Dual CPU
Concurrent 170
170 option installed
SECDED CS
Performance monitor installed
Enable processor microstep
Enable processor trap
Control CYBER 170 exchange
in CPU
Enable processor fault status
Enable MAP RMA mode
Enable KAP file 0
Enable MAP file 1
Enable MAP file 2
Enable MAP file 3
Enable instruction retry
Enable instruction step
Not used
Enable test mode
Not used
Disable corrected error to
Status summary
Enable control store
breakpoint
Enable control store .sweep
Force good response on
Single bit error
Disable corrected error log
Not used
Register data
Not Used
Control store breakpoint
Address
*
Contains the address at which a micrand is to be executed.
**
Contains the address at which control store execution or control store
sweep stops if enabled by control store breakpoint enable bit in the
Environment Control register.
Not used Bits are not assigned; may be read or written.
60469500 B
5-9
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