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CC11x1-Q1
SWRS076B – 11-07-22-013 - APRIL 2009 – REVISED APRIL 2010
Table 3-6. Channel Filter Bandwidths (kHz) (Assuming a 26-MHz Crystal)
MDMCFG4.
CHANBW_M
00
01
10
11
For best performance, the channel filter bandwidth should be selected so that the signal bandwidth
occupies at most 80% of the channel filter bandwidth. The channel center tolerance due to crystal
accuracy should also be subtracted from the signal bandwidth, as shown in the following example.
With the channel filter bandwidth set to 500 kHz, the signal should stay within 80% of 500 kHz, which is
400 kHz. Assuming 915-MHz frequency and ±20-ppm frequency uncertainty for both the transmitting
device and the receiving device, the total frequency uncertainty is ±40 ppm of 915 MHz, which is ±37 kHz.
If the whole transmitted signal bandwidth is to be received within 400 kHz, the transmitted signal
bandwidth should be maximum 400 kHz – (2 × 37 kHz), which is 326 kHz.
3.10 Demodulator, Symbol Synchronizer, and Data Decision
CC11x1-Q1 contains an advanced and highly configurable demodulator. Channel filtering and frequency
offset compensation are performed digitally. To generate the RSSI level (see
information) the signal level in the channel is estimated. Data filtering is also included for enhanced
performance.
3.10.1 Frequency Offset Compensation
When using 2-FSK, GFSK, or MSK modulation, the demodulator compensates for the offset between the
transmitter and receiver frequency, within certain limits, by estimating the center of the received data. This
value is available in the FREQEST status register. Writing the value from FREQEST into
FSCTRL0.FREQOFF the frequency synthesizer is automatically adjusted according to the estimated
frequency offset.
The tracking range of the algorithm is selectable as fractions of the channel bandwidth with the
FOCCFG.FOC_LIMIT configuration register.
If the FOCCFG.FOC_BS_CS_GATE bit is set, the offset compensator freezes until carrier sense asserts.
This may be useful when the radio is in RX for long periods with no traffic, because the algorithm may drift
to the boundaries when trying to track noise.
The tracking loop has two gain factors, which affect the settling time and noise sensitivity of the algorithm.
FOCCFG.FOC_PRE_K sets the gain before the sync word is detected, and FOCCFG.FOC_POST_K
selects the gain after the sync word has been found.
Frequency offset compensation is not supported for ASK or OOK modulation.
3.10.2 Bit Synchronization
The bit synchronization algorithm extracts the clock from the incoming symbols. The algorithm requires
that the expected data rate is programmed as described in
continuously to adjust for error in the incoming symbol rate.
3.10.3 Byte Synchronization
Byte synchronization is achieved by a continuous sync word search. The sync word is a 16-bit
configurable field (can be repeated to get a 32 bit) that is automatically inserted at the start of the packet
30
Detailed Description
MDMCFG4.CHANBW_E
00
01
812
406
650
325
541
270
464
232
NOTE
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10
11
203
102
162
81
135
68
116
58
Section 3.13.3
Section
3.8. Resynchronization is performed
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