Spi Flash; Uart1 Interface; Usb Interface - Analog Devices ADZS-BF707-BLIP2 System Manual

SPI Flash

SPI Flash

UART1 Interface

USB Interface

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To disable the automatic setting of the memory controller registers, select
Target Options from the Session menu in CCES and uncheck Use XML
reset values.
The ADSP-BF707 processor has three SPI interfaces: SPI0, SPI1, and
SPI2. SPI2 is connected to a Winbond W25Q32BC 32 Mb serial flash
memory with quad SPI support. This flash is used for booting and
scratchpad space.
The ADSP-BF707 processor has two built-in universal asynchronous
transmitters (UARTs).
UART1
to UART converter IC (
For more information, refer to the UART1 example, which is included in
the ADZS-BF707-BLIP2 Board Support Package.
The ADSP-BF707 processor has an integrated USB PHY; the BLIP2
board provides a micro AB connector. The board supports USB high
speed mode.
To learn about the device and host modes of the processor, refer to the
USB example, which is included in the ADZS-BF707-BLIP2 Board Sup-
port Package. For more information, refer to the ADSP-BF70x Blackfin+
Processor Hardware Reference.
ADZS-BF707-BLIP2 Board Evaluation System Manual
is connected to an FTDI, FT232RQ, USB
).
U15