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1256E User Manual
*TRG Command
*WAI Command
SCPI Status
Registers
Racal Instruments © 2002
When bit 7 of the status byte (Service Requested) is
set to show that SRQ is asserted, the 1256 will not
respond to any GPIB commands until the interrupt
has been serviced. Servicing may be done with a
serial poll. After the interrupt has been serviced, the
error code generated must be obtained via GPIB.
Bits 6 and 7 are cleared after each Serial Poll Enable (SPE)
command. Bit 5 is cleared by sending instructions to the 1256, and
is set when the 1256 finishes executing a command. These
transitions coincide with the rising and falling edges, respectively,
of the External Trigger Out signal. All status bits are active-high.
The *TRG command is required by the IEEE-488.2 specification. If
the
1256
is
armed
INIT:CONTINUOUS commands), and the trigger source is "BUS"
(see the TRIGGER:SOURCE command), then this will cause the
next scan list action to occur.
This is equivalent to sending a GPIB bus trigger.
The *WAI command is required by the IEEE-488.2 specification.
This command is accepted but has no effect on the 1256.
SCPI defines two additional registers beyond those shown in
Figure 5-1. These are the Operation Status Register and the
Questionable Status Register.
The Operation Status Register consists of three logical registers: a
condition register, an enable register, and an event register. If any
bit is set in the operation event register, bit 7 of the status byte
register will also be set.
The Operation Status Condition Register holds the present
condition of various instrument attributes. This register is a set of
1-bit flags. The conditions assigned to the bits of the register are
shown below:
Digital trigger event
NOTE
(see
the
INIT:IMMEDIATE
Bit 7, Bit weight = 128 decimal = 80
hexadecimal
SCPI Command Basics 5-21
and
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