Standard Event Status Register; Status Byte Register - Racal Instruments 1256E Manual

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1256E User Manual
Standard EVENT
STATUS Register
STATUS BYTE
Register
Racal Instruments © 2002
Figure 5-1 shows four related registers. The Standard Event Status
Register, the Standard Event Status Enable Register, the Status
Byte Register, and the Service Request Enable Register.
The Standard Event Status Register reflects the present status of
the instrument. This register consists of eight 1-bit flags. Each flag
represents a true or false indication of the corresponding condition.
The bits of this register are:
PON
Power-On
Bit 7 (MSB), Bit weight = 128 decimal = 80
hexadecimal
This flag is set when the instrument is powered on .
URQ
User Request
Bit 6, Bit weight = 64 decimal = 40 hexadecimal
This bit is never set by the 1256 and will always
read 0.
CME
Command Error
Bit 5, Bit weight = 32 decimal = 20 hexadecimal
This bit is set when a command error is detected by
the 1256.
Errors of this type will also result with an error
added to the error queue. The error may be read
using the SYST:ERR? query to determine the cause
of the error
EXE
Execution Error
Bit 4, Bit weight = 16 decimal = 10 hexadecimal
This bit is set when a valid command is received but
cannot be executed for some reason. For example,
an error occurs while executing the *SAV command.
When this error occurs, an error message is added
to the message queue and may be read using the
SYST:ERR? query.
SCPI Command Basics 5-9

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