Alinx UltraScale+ AXU4EV-P User Manual page 7

RS485x2
MAX3485
SN65HVD
CANx2
232
HDMI输
ADV7611
入
HDMI输
ADV7511
出
SFP接口
SFP接口
Figure 1-1-1: The Schematic Diagram of the AXU4EV-P
Through this diagram, you can see the interfaces and functions that the
AXU4EV-P FPGA Development Board contains:
 ACU4EV core board
It consists of ZU4EV +4GB DDR4 （PS） +1GB DDR4 （PL） +8GB eMMC
FLASH + 256Mb QSPI FLASH, and there are 2 crystal oscillators to
provide the clock, a single-ended 33.3333MHz crystal oscillator for the
PS system, and a differential 200MHz crystal oscillator for the PL logic
DDR reference clock.
 M.2 Interface
1 PCIEx1 standard M.2 interface, used to connect M.2 SSD solid state
drives, with a communication speed of up to 6Gbps.
 DP Output Interface
1 standard Display Port output display interface, used for video image
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ZYNQ Ultrascale + FPGA Board AXU4EV-P User Manual
JTAG
FMC接口
QSPI
FLASH
33.333M
hz
XILINX
200Mhz
UltraScale+
MPSoC
XCZU4EV
DDR4
DDR4 DDR4
PCIE X2
USB UART
USB UART
CP2102
CP2102
核心板
eMMC
FLASH
DDR4 DDR4
LED&KEY Si5332 125Mhz
SD Card
TXS0261
2RTWR
USB3320
C
GL3523
KSZ9031R
KSZ9031R
M.2连接器
www.alinx.com
DP输出
USB3.0
接口x2
USB3.0
接口x2
以太网网
口
以太网网
口