Omron SYSMAC CVM1 Series Operation Manual page 99

Duplex system
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Branching Instruction Lines
In this example, TR0 and TR1 are used to store the execution conditions at the
branching points. After executing instruction 1, the execution condition stored in
TR1 is loaded for an AND with the status CIO 000003. The execution condition
stored in TR0 is loaded twice, the first time for an AND with the status of
CIO 000004 and the second time for an AND with the inverse of the status of
CIO 000005.
TR bits can be used as many times as required as long as the same TR bit is not
used more than once in the same instruction block. A new instruction block is
begun each time execution returns to the bus bar. If, in a single instruction block,
it is necessary to have more than eight branching points that require the execu-
tion condition be saved, interlocks (which are described next) must be used.
When drawing a ladder diagram, be careful not to use TR bits unless necessary.
Often the number of instructions required for a program can be reduced and
ease of understanding a program increased by redrawing a diagram that would
otherwise required TR bits. In both of the following pairs of diagrams, the bottom
versions require fewer instructions and do not require TR bits. In the first exam-
ple, this is achieved by reorganizing the parts of the instruction block: the bottom
one, by separating the second OUTPUT instruction and using another LOAD
instruction to create the proper execution condition for it.
Note Although simplifying programs is always a concern, the order of execution of
instructions is sometimes important. For example, a MOVE instruction may be
required before the execution of a BINARY ADD instruction to place the proper
data in the required operand word. Be sure that you have considered execution
order before reorganizing a program to simplify it.
0000
TR0
00
0000
00
0000
00
0000
0000
TR0
01
02
0000
04
0000
0000
01
02
0000
00
0000
0000
01
04
0000
01
0000
01
0000
03
0000
03
Section 4-5
Instruction 1
Instruction 2
Instruction 2
Instruction 1
Instruction 1
Instruction 2
Instruction 1
Instruction 2
81

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