Omron SYSMAC CVM1 Series Operation Manual page 126

Duplex system
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Ladder Diagram Instructions
OR: OR
Ladder Symbols
B
B
B
OR NOT: OR NOT
Ladder Symbols
B
B
Description
Precautions
Flags
108
B
B
B
These six basic instructions correspond to the conditions on a ladder diagram.
As described in Section 4 Writing Programs, the status of the bits assigned to
each instruction determines the execution conditions for all other instructions.
Each of these instructions and each bit address can be used as many times as
required. Each bit can be used in as many of these instructions as required.
The status of the bit operand (B) assigned to LD or LD NOT determines the first
execution condition. AND takes the logical AND between the execution condi-
tion and the status of its bit operand; AND NOT, the logical AND between the
execution condition and the inverse of the status of its bit operand. OR takes the
logical OR between the execution condition and the status of its bit operand; OR
NOT, the logical OR between the execution condition and the inverse of the sta-
tus of its bit operand.
These six instructions use only one word of program memory, not two, when the
operand is in the CIO Area between CIO 000000 and CIO 051115, saving pro-
gram memory and reducing the instruction execution time. Two words of pro-
gram memory are required for all other operands.
TR bits are added to the program automatically when creating the program with
the ladder diagram using the SSS. Input TR bits only when inputting the program
with mnemonics. The ladder symbol for loading TR bits is different from that
shown above for LD and LD NOT. Refer to 4-3-3 Ladder Instructions for details.
Note: Immediate-refresh variations can be used in simplex mode only; they cannot be
used in duplex mode.
There is no limit to the number of any of these instructions, or restrictions in the
order in which they must be used, as long as the program memory capacity of
the PC is not exceeded.
There are no flags affected by these instructions.
Operand Data Area
B: Bit
CIO, G, A, T, C
Mnemonics
! j OR
OR
j OR
i OR
Operand Data Area
B: Bit
CIO, G, A, T, C
Mnemonics
OR NOT
! OR NOT
Section 5-6
! i OR
! OR

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