Quectel BG772A-GL Hardware Design page 25

Debug UART Interface
Pin Name Pin No.
DBG_RXD 61
DBG_TXD 60
DBG_CTS 51
DBG_RTS 92
Auxiliary UART Interface
Pin Name Pin No.
AUX_TXD 93
AUX_RXD 82
AUX_CTS 70
AUX_RTS 59
PCM Interface*
Pin Name Pin No.
PCM_CLK 3
PCM_SYNC 35
PCM_DIN 2
PCM_DOUT 34
I2C Interface*
Pin Name Pin No.
I2C_SCL 37
BG772A-GL_Hardware_Design
I/O Description
Debug UART
DI/PU
receive
Debug UART
DO/PU
transmit
Debug UART clear
DO/PU
to send
Debug UART
DI/PD
request to send
I/O Description
Auxiliary UART
DO/PU
transmit
Auxiliary UART
DI/PU
receive
Auxiliary UART
DO/PU
clear to send
Auxiliary UART
DI/PU
request to send
I/O Description
DO/PD PCM clock
PCM data frame
DO/PU
sync
DI/PU PCM data input
DO/PU PCM data output
I/O Description
I2C serial clock
OD (for external
codec)
LPWA Module Series
BG772A-GL Hardware Design
DC
Comment
Characteristics
1.8 V
1.8 V
If this pin is unused,
keep it open.
1.8 V
1.8 V
DC
Comment
Characteristics
1.8 V
1.8 V
If this pin is unused,
keep it open.
1.8 V
1.8 V
DC
Comment
Characteristics
1.8 V
1.8 V
If this pin is unused,
keep it open.
1.8 V
1.8 V
DC
Comment
Characteristics
External pull-up
resistor is required.
1.8 V only.
If this pin is unused,
keep it open.
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