Quectel BG772A-GL Hardware Design page 24

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USB_DP
11
USB_DM
10
USBPHY_3P3
42
USBPHY_3P3
64
_EN
(U)SIM Interface
Pin Name
Pin No.
USIM_DET*
44
USIM_VDD
16
USIM_RST
15
USIM_DATA
14
USIM_CLK
13
USIM_GND
65
Main UART Interface
Pin Name
Pin No.
MAIN_DTR
62
MAIN_RXD
6
MAIN_TXD
7
MAIN_CTS
39
MAIN_RTS
38
MAIN_DCD
90
MAIN_RI*
76
BG772A-GL_Hardware_Design
USB differential
DIO
data (+)
USB differential
DIO
data (-)
Power supply for
PI
USB PHY circuit
External LDO
DO/PU
enable control for
USB
I/O
Description
(U)SIM card
DI/PD
hot-plug detect
(U)SIM card power
PO
supply
DO/PD
(U)SIM card reset
DIO/PU
(U)SIM card data
DO/PD
(U)SIM card clock
Specified ground
for (U)SIM card
I/O
Description
Main UART data
DI/PU
terminal ready
Main UART
DI/PU
receive
Main UART
DO/PU
transmit
Main UART clear
DO/PU
to send
Main UART
DI/PU
request to send
Main UART data
DO/PU
carrier detect
Main UART ring
DO/PU
indication
LPWA Module Series
BG772A-GL Hardware Design
Compliant with USB
2.0 standard
specification. Require
differential impedance
of 90 Ω.
Vnom = 3.3 V
1.8 V
DC
Comment
Characteristics
If this pin is unused,
1.8 V
keep it open.
Vmax = 1.9 V
Only 1.8 V (U)SIM
Vmin = 1.7 V
card is supported.
1.8 V
1.8 V
1.8 V
DC
Comment
Characteristics
1.8 V
1.8 V
1.8 V
If this pin is unused,
1.8 V
keep it open.
1.8 V
1.8 V
1.8 V
23 / 75

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