Multiple Boards Connection; Figure 8. Three Boards Connection - STMicroelectronics EVALSTGAP4S User Manual

For stgap4s advanced galvanically isolated gate driver
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5

Multiple boards connection

To evaluate complex topologies, like a full inverter, it is possible to connect multiple EVALSTGAP4S boards
through connectors J2 and J4. The drivers can be configured through the daisy chain connection of the SPI bus
where the driver in the lowest board is the master and must be connected to the μC board using the J7 connector
and all the other drivers in the chain are slaves. In
implement a full three-phase inverter.
The master board must be supplied with VCC, as done in the single board topology, and the supply is propagated
to slave boards through the J2 connector. On each board, the VCC feeds the local flyback and the local on-board
3.3 V linear regulator. The upper slave board (#2 in
on the other boards the setting must be with JR11=OPEN to propagate the SPI communication through the J2
connector.
The PWM input signals can be set either as "shoot-through protection" or "independent" as already reported for
the single board configuration and according to
JR6=CLOSE
VCC propagated from lower board
JR5=CLOSE
VCC propagated to upper board
JR11=OPEN
Daisy chain propagated to upper board
VCC propagated
to slave boards
JR6=CLOSE
VCC propagated from lower board
JR5=CLOSE
VCC propagated to upper board
JR11=OPEN
Daisy chain propagated to upper board
UM3153 - Rev 1
Figure 8.
JR11=CLOSE
Daisy chain loop closed
SLAVE #2
J3 - PWM inputs
SLAVE #1
J3 - PWM inputs
GND
VCC
J1 - Power supply
J9 - uC connection
MASTER #1
J3 - PWM inputs
SPI daisy chain
with 6 devices
Figure 8
the connection of three boards is shown, that allows to
Figure
8) is set with JR11=CLOSE to close the SPI loop, while
Table
7.
Three boards connection
SDI
UM3153
Multiple boards connection
SLAVE #2
HV
OUT
GNDPWR
SLAVE #1
HV
OUT
GNDPWR
MASTER
HV
OUT
GNDPWR
page 17/28

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