Single Board; Figure 5. Single Board Configuration With Hardware Shoot-Through Protection - STMicroelectronics EVALSTGAP4S User Manual

4

Single board

The EVALSTGAP4S is provided with a ready-to-use SiC MOSFET half-bridge. The board must be supplied
feeding the VCC voltage to the J1 connector. The VCC voltage is used to supply the flyback section of each driver
and the on-board linear regulator that generates the 3V3IN for both the drivers. The high-voltage side of each
driver is fed by its own integrated flyback power supply followed by a post-regulator.
The board is set in order to supply the driver with the following voltages:
• 3V3IN = 3.3 V
• VH-GNDISO = 18 V
• VL-GNDISO = -5 V
The drivers can be used with the default configuration or programmed through SPI to set the internal configuration
registers. The drivers are connected in daisy chain, where the low-side driver is the master and the high-side is
the slave.
The logic lines SD, DIAG1, and DIAG2 are shared by the two drivers. The IN+ and IN- pins of the drivers are
connected in order to achieve the interlocking function for cross conduction prevention. The power switches can
be turned on properly driving the two lines IN+_L, IN+_H available on the J3 connector.
Alternatively, the board can be set to independently control the PWM pins of each driver (see
about the configuration of the jumpers).
JR1=CLOSE
3.3V from on-board
linear regulator
J1 - Power supply
J9 - uC connection
IN+_L = IN-_H
IN+_H = IN-_L
J3 - PWM inputs
JR13=JR14=CLOSE
INTERLOCKED
CONFIGURATION
UM3153 - Rev 1
Figure 5. Single board configuration with hardware shoot-through protection
JR11=CLOSE
Single board daisy chain
with two devices
GND
VCC
GND
UM3153
Single board
Table 7 for details
HV
OUT
GNDPWR
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