Evaluation Board Hardware; Overview; Board Layout; Power Supply Inputs - Analog Devices ADRF5549-EVALZ User Manual

ADRF5549-EVALZ

EVALUATION BOARD HARDWARE

OVERVIEW

The ADRF5549-EVALZ evaluation board is a connectorized
board, assembled with the ADRF5549
circuitry. All components are placed on the primary side of
evaluation board. An assembly drawing for the evaluation board
is shown in Figure 5. An evaluation board schematic is provided
in Figure 4. Table 4 provides the bill of materials (BOM) list for
evaluation board components.

BOARD LAYOUT

The ADRF5549-EVALZ is designed using RF circuit design
techniques on an 8-layer PCB. The PCB stack-up is shown in
Figure 2.
W = 18mil
2oz Cu (2.7mil) 2oz Cu (2.7mil)
RO4350 = 10mil
1oz Cu (1.3mil)
FR4
1oz Cu (1.3mil)
FR4
1oz Cu (1.3mil)
FR4
1oz Cu (1.3mil)
FR4
1oz Cu (1.3mil)
FR4
1oz Cu (1.3mil)
FR4
2oz Cu (2.7mil)
Figure 2. Evaluation Board Stack-Up
The outer copper layers are 2 oz (2.7 mil) thick and the inner
layers are 1 oz (1.3 mil) thick.
User Guide
and its application
G = 13mil
2oz Cu (2.7mil)
T = 2.7mil
H = 10mil
The top dielectric material is 10 mil Rogers 4350B, which provides
50 Ω controlled impedance and optimizes high frequency
performance. The remaining six dielectric layers are FR4 based
filler layers that improve the mechanical strength of the board
and meet the overall board thickness of approximately 63 mil.
All RF traces are routed on the top layer, and the remaining
seven layers are ground planes that provide a solid ground for
the RF transmission lines and help to manage the thermal rise
on the evaluation board during high power operations.
The RF transmission lines are designed using a coplanar
waveguide (CPWG) model with a width of 18 mil and ground
spacing of 13 mil to have a characteristic impedance of 50 Ω.
Ground via fences are arranged on both sides of a CPWG to
improve isolation between nearby RF lines and other signal
lines.
The exposed ground pad of the ADRF5549, which is soldered on
the PCB ground pad, is the main thermal conduit for heat
dissipation. The PCB ground pad is densely populated with filled
through vias to provide the lowest possible thermal resistance
path from the top to the bottom of the PCB. The connections
from the package ground leads to ground are kept as short as
possible.

POWER SUPPLY INPUTS

The ADRF5549-EVALZ evaluation board has five power supply
inputs and one ground, as shown in Table 1. The dc test points
are populated only on SWVDDB, VDD1_A, and VDD1_B,
whereas VDD2_A and VDD2_B are shorted to VDD1_A and
VDD1_B, respectively, via 0 Ω resistors. A single 5 V supply is
connected to the dc test points on SWVDDB, VDD1_A, and
VDD1_B. The typical total current consumption for the
ADRF5549 is 180 mA.
Each supply pin for the LNAs of the
with 1000 pF and 10 µF capacitors. A 10 µF capacitor is used on
the supply line for the switches of the ADRF5549.
Table 1. Power Supply Inputs and Ground
Test Points Description
VDD1_A Supply LNA Stage 1 on Channel A
VDD2_A Supply LNA Stage 2 on Channel A, do not insert (DNI)
VDD1_B Supply LNA Stage 1 on Channel B
VDD2_B Supply LNA Stage 2 on Channel B, DNI
SWVDDB Supply switches on Channel A and Channel B
GND1 Ground
Rev. 0 | Page 3 of 9
UG-1676
ADRF5549 is decoupled