The RESETn signal is not synchronized to any other SDRAM signals and should be treated on
the board as an asynchronous signal.It must be separated from all other signals.
Marvell recommends using address mirroring in clamshell topologies. Address mirroring can be
applied to either one of the chip selects. Refer to the device Functional Specifications for the
exact swapped bits definition.
In clamshell topologies, when more than 2 devices are connected to the same clock, each chip
select rank should be connected to a different clock signal.
Copyright © 2017 Marvell
August 30, 2017
Document Classification: Public
32-bit SDRAM DDR4 Interface
Interface Signals Layout Guidelines
Doc. No. MV-S302310-U0 Rev. A
Page 79