88F6810, 88F6820 and 88F6828
Hardware Design Guide
Figure 11: Voids Underneath BGA Device Ball
Note
Figure 12: Voids Underneath SMT Connector/QFP Lead Frame Pads
Look at via structures:
•
Form rectangular via anti-pads to reduce via capacitance.
•
Minimize via stub length (see
•
Keep in mind that through hole devices' pads have large vias. Look at the specific device's
recommendations for routing high-speed serial differential traces.
Pay special attention to the distance between any two capacitive discontinuities. In a case of a
consecutive capacitive discontinuity, simulate the entire interconnect to verify there are no
excessive reflections or notches in the insertion loss and return loss curves.
Doc. No. MV-S302310-U0 Rev. A
Page 24
Reference plane voids
For low pitch devices, with less than a 1 mm pitch, the reference plane voids should be
similar in size and shape to the ball pads. This will avoid forming slots in the reference
plane.
Section 2.10, Via
Document Classification: Public
BGA device balls
SMT connector /
QFP lead frame
Void
Structures).
Copyright © 2017 Marvell
August 30, 2017