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ADRF6650-EVALZ
LO GENERATION AND EXTERNAL LO INPUT
The
ADRF6650
offers two alternatives to generating the differential
LO input signal: externally via a high frequency, low phase noise
LO signal or internally via the on-chip, fractional-N synthesizer
and on-chip, voltage controlled oscillators (VCOs). In either
case, the differential LO signal can be routed off-chip through
the balun to the subminiature A (SMA) connector, LO_OUT.
For an internal LO configuration using the on-chip, fractional-
N synthesizer, apply a low phase noise reference signal to the
reference input, shown in Figure 2. The phase-locked loop
(PLL) reference input can support a wide frequency range,
because the dividing blocks or multiply blocks can increase or
decrease the reference frequency to the desired phase frequency
detector (PFD) frequency value. The integrated synthesizer
enables continuous LO coverage from 450 MHz to 2900 MHz.
The PLL filter components populated on the evaluation board
are for a 20 kHz bandwidth (see Figure 23).
For optimum performance using an external LO source, drive
the LO inputs using the EX_LO_NEG and EX_LO_POS
connectors on the evaluation board. The wide input range of
the external LO input spans from 450 MHz to 2900 MHz. Unless
an ac-coupled balun generates the differential LO, the inputs
must be ac-coupled. The input impedance of the differential LO
signals is 100 Ω and must be taken into account when driving
differentially. For the default configuration of the LO inputs on
the ADRF6650-EVALZ, apply a single-ended LO input to the
SMA labeled EX_LO_NEG, the on-board balun converts the
signal to differential.
User Guide
IF OUTPUTS
The
ADRF6650
differential impedance of 10 Ω as looking into the IF output
pins. External series 25 Ω resistors on each differential line
optimizes the performance of the ADRF6650. The output
impedance with the 25 Ω series resistors displays as 60 Ω
differential for both IF outputs. The 60 Ω differential output
impedance terminates with 100 Ω differential for optimal
performance, providing a good output impedance match and
linearity performance.
For measurement purposes with instruments that have 50 Ω
input impedance, the evaluation board employs a 1:1 transformer
(TC1-1-13MX+) and a resistive matching network, shown in
Figure 20. The TC1-1-13MX+ is a wide bandwidth (4.5 MHz to
3000 MHz) 1:1 transformer with a flat passband response and
converts single-ended 50 Ω resistance to 50 Ω differential
resistance. A resistive matching network converts the 50 Ω
differential impedance to 100 Ω differential. The circuit topology
allows the 60 Ω IF output impedance to terminate with 100 Ω
impedance in a 50 Ω measurement environment. The resistive
matching network introduces a loss around 7.5 dB and the user
must account for the associated loss in measurements.
The ADRF6650-EVALZ evaluation board is configured for
single-ended outputs in default mode. For a single-ended
output, use the IFOUT_A_POS connector with the on-board
balun. For a single-ended output, use the IFOUT_B connector
with the on-board balun.
SERIAL PORT INTERFACE (SPI)
The SPI of the
ADRF6650
and CS pins, is controlled via an external
and the
ACE
software.
Rev. A | Page 5 of 17
intermediate frequency (IF) outputs have a
consisting of the SCLK, SDIO, SDO,
SDP-S
UG-1026
controller board
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