RadiSys EPC-26A/27 Manual page 62

Appendix B: Chip Set & I/O Map
Second Interrupt Controller:
PicoPower Redwood chip set emulating 8259 of PC/AT
I/O Addr Functional group Usage
0A0 Interrupt controller 2 Port 0
0A1 Port 1
Second (16-bit) DMA Controller:
PicoPower Redwood chip set emulating 8237 of PC/AT
I/O Addr Functional group Usage
0C0 DMA Channel 4 address
0C2 Channel 4 count
0C4 Channel 5 address
0C6 Channel 5 count
0C8 Channel 6 address
0CA Channel 6 count
0CC Channel 7 address
0CE Channel 7 count
0D0 Command/status
0D2 DMA request
0D4 Command register (R)
Single-bit DMA req mask(W)
0D6 Mode
0D8 Set byte pointer (R)
Clear byte pointer (W)
0DA Temporary register (R)
Master clear (W)
0DC Clear mode reg counter (R)
Clear all DMA req mask (W)
0DE All DMA request mask
Coprocessor Interface:
An integrated co-processor replaces the 80287 of PC/AT
I/O Addr Functional group Usage
0F0 Coprocessor Clear coprocessor busy
0F1 Reset coprocessor
Serial I/O (Com2) Port:
PicoPower Redwood chip set emulates 16550 of PC/AT
I/O Addr Functional group Usage
2F8 COM2 serial port Receiver/transmitter buffer
Baud rate divisor latch (LSB)
2F9 Interrupt enable register
Baud rate divisor latch (MSB)
2FA Interrupt ID register
2FB Line control register
2FC Modem control register
2FD Line status register
2FE Modem status register
B
Page B3
B