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Programming Interface
Flash Data Access
Flash disk data can be read from address 8383. Writing to this address will
cause a write to a flash device control register, which may result in
unpredictable results. The details of manipulating the flash devices, such as
using their command register and identifier, are not specified here; consult the
datasheets for the Intel flash memory devices. Note that some functions
require the write-protection jumper to be in the write-enabled position.
SRAM data access
The battery-backed SRAM is accessed in a similar fashion as the flash. The three low
order address registers are set to the appropriate SRAM address and then an I/O read
or write is performed to I/O address 8384 to read or write a byte of SRAM.
Address aliasing occurs when accessing the lower density SRAM chips. This
may be used by software to determine the size of memory installed. The
EPC-26A/27 uses a 128Kx8 chip SRAM chip; address aliasing begins at the
1MB boundary.
Note that during power-down transition there is a very small probability that a
single byte of SRAM or flash memory could be incorrectly written. This is the
same problem that a disk drive has if it is powered off during a sector write.
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Battery Low Condition
If bit 0 is set to 0 in register 8387, the battery needs replacing because the
voltage is less than approximately 2.5V. Note that the XFORMAT software
will fail when the battery is low. The SRAMDISK.SYS driver issues a warning
before continuing. The remainder of the bits in register 8387 are undefined.
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