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Manuals and User Guides for RadiSys EPC-3307. We have
1
RadiSys EPC-3307 manual available for free PDF download: Hardware Reference Manual
RadiSys
EPC-3307
Hardware Reference Manual
RadiSys EPC-3307 Hardware Reference Manual (158 pages)
Brand:
RadiSys
| Category:
Computer Hardware
| Size: 1 MB
Table of Contents
Table of Contents
4
Figures
8
Chapter 1: Overview
14
Figure 1-1. the EPC-3307
14
Feature Summary
15
Compactpci Bus
17
Specifications
17
Table 1-1. EPC-3307 Environmental Specifications
17
Chapter 2 : Configuration and Installation
21
Setting Jumpers and Headers
21
Figure 2-1. EPC-3307 CPU Board: Jumper Locations
21
Figure 2-2. Flash Header Settings
21
Flash
21
Mfg
22
Inserting the EPC-3307
22
Maintaining and Upgrading the EPC-3307
23
Removing the EPC-3307
23
Replacing the Battery
23
Chapter 3: BIOS Configuration
26
BIOS Setup Screens
26
Menu Map
27
Navigation
27
Main Setup Menu
28
Figure 3-1. BIOS Main Setup Menu
28
Primary/Secondary Master/Slave Sub-Menus
29
Figure 3-2. Primary/Secondary Master/Slave Sub-Menus
30
Figure 3-3. Keyboard Features Sub-Menu
34
Keyboard Features Sub-Menu
34
About Shadow Memory Regions
36
Figure 3-4. UBE Shadow Control Sub-Menu
36
UBE Shadow Control Sub-Menu
36
Advanced Menu
38
Figure 3-5. Advanced Menu
38
Console Redirection Sub-Menu
42
Figure 3-6. Console Redirection Sub-Menu
42
Figure 3-7. I/O Device Configuration Sub-Menu
44
I/O Device Configuration Sub-Menu
44
Figure 3-8. PCI Configuration Sub-Menu
46
PCI Configuration Sub-Menu
46
Cache Memory Sub-Menu
47
Figure 3-9. Cache Memory Sub-Menu
47
Advanced Chipset Control Sub-Menu
52
Figure 3-10. Advanced Chipset Control Sub-Menu
52
Boot Menu
53
Figure 3-11. Boot Menu
53
Exit Menu
54
Figure 3-12. Exit Menu
54
CMOS Save and Restore Sub-Menu
56
Figure 3-13. CMOS Save and Restore Sub-Menu
56
Theory of Operation
58
Chapter 4 : Theory of Operation
59
Features
59
CPU Module
59
Figure 4-1. EPC-3307: Block Diagram
59
Flash Boot Device
60
Interrupt Usage
60
Memory Map
60
BIOS ROM and ROM Shadowing
61
440GX Host Bridge
62
440GX PCI Bus
62
Figure 4-2. Flash Boot Device Memory
62
DRAM/SDRAM Memory Controller
63
Table 4-1. 440GX Unsupported Commands
63
Compatibility Devices
64
IDE Controller
64
PCI-ISA Bridge
64
PIIX4E PCI-ISA Bridge
64
Enhanced USB Controller
65
Rtc
65
Smbus Interface and Implementation
65
Intel 21554 PCI-PCI Bridge
66
CPU Board Reset on Host Command over Compactpci
67
Reset Control Register
67
EPC-3307 CT Architecture
68
Figure 4-2. EPC-3307 CT Architecture
68
H.110 Telephony Interface
68
Table 4-2. T8105 Summary
68
Table 4-3. T8105 I/O Map
68
Table 4-4. T8105 Signals
69
Clocking
70
General Purpose I/Os
70
Table 4-5. T8105 Clock Sources
70
5.0V PMC Site
71
Compactpci Hot Swap
71
PCI Bus Implementation and Devices
72
PCI Ethernet Controllers
72
Table 4-6. PCI Device Configuration
72
Battery
73
Floppy Disk
73
See Appendix E, Rear Transition Module (RTM).
73
Super I/O
73
COM Ports
74
IPMI Baseboard Management Controller (BMC)
74
Keyboard and Mouse Controller
74
CPLD ISA Interface
75
HDD Option
75
Special Features
75
Table 4-7. CPLD I/O Ports
75
Table 4-8. CPLD Indexes for Function Registers
76
Watchdog Timer
76
Front Panel Red/Green LED
77
Table 4-10. Front Panel User LED Control
77
Table 4-9. Watchdog Control Register
77
Last Reset Source
78
Local Interrupt Control Register
78
Table 4-11. Last Reset Source Register
78
Table 4-12. Local Interrupt Enables
78
Reset Controller
79
Table 4-13. Reset Control Register
79
Compactpci Features Register
80
Hot Swap Signals
80
Table 4-14. Hot Swap Signals
80
Table 4-15. Compactpci Features Register
80
BIOS Bank Switching (Build-Time Option)
81
IPMI Special Utility
81
Table 4-16. Compactpci Geographical Address
81
Table 4-17. IPMI Special Utility
81
Organization
59
Block Diagram
59
BIOS Bank Switching
81
Figure 4-3. BIOS Paging
82
Table 4-18. BIOS Control Register
82
Table 4-19. Flash Banks
82
Board Dimensions and Specifications
83
Power Monitoring, Consumption, and Reset Generation
83
Table 4-20. Reset Trip Points
83
Table 4-21. Power Consumption
83
Appendix A: Chipset and I/O Map
86
Table A-1. First (8-Bit) DMA Controller
86
Table A-2. First Interrupt Controller
86
Table A-3. PCI Arbiter Control
86
Table A-4. Time/Counter Functions
87
Table A-5. Keyboard Controller
87
Table A-6. Real-Time Clock
87
Table A-7. POST Checkpoint
87
Table A-8. DMA Page Registers: Intel EX 82371EB of PC/AT ................................................................. Table A-9. Port a
88
Table A-10. VGA Controller
88
Table A-11. Second Interrupt Controller
88
Table A-12. Power Management Controller
88
Table A-13. Second (16-Bit) DMA Controller
89
Table A-14. Coprocessor Interface
89
Table A-15. VGA Controller
89
Table A-16. Secondary IDE
89
Table A-17. CPLD
90
Table A-18. Primary IDE
90
Table A-19. ISA Plug and Play
90
Table A-20. EGA
90
Table A-21. Serial I/O (COM 4) Port
90
Table A-22. Serial I/O (COM 2) Port
91
Table A-23. Secondary IDE
91
Table A-24. Parallel I/O (LPT1) Port
91
Table A-25. EPP Port
91
Appendix B: Interrupts
96
Connectors
98
Appendix C: Connectors
99
This Appendix Details the Connectors on the EPC-3307 CPU Board and Gives the
99
For more Information about Connectors on the RTM, See Appendix E, Rear
99
Connector Locations
99
Figure C-1. EPC-3307 Main Board: Connectors
99
J1 Connector
99
PMC a Connectors
99
Pmc B
99
Memory Card Connectors
99
Compactpci Connectors
100
J1 Connector
100
J2 Connector
101
Ethernet (Optional)
117
Serial Port (COM 1)
117
Front Panel
118
Leds
118
Reset Switch
118
Figure E-1. EPC-3307 Rear Transition Module: Connectors
126
Figure F-1. Installing a PMC Module
134
Figure F-2. Separating a PMC Module from the Main Board
135
Figure G-1. Flash Chip Configuration
136
Figure G-2. Flash Chip Re-Programming Coverage
137
Figure G-3. Flash Chip Re-Programming Process Flow
138
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