Altera Cyclone V SoC User Manual page 16

4–4
Table 4–2. SW3 DIP Switch Settings (Part 2 of 2)
Switch
3
4
5
3. Set the DIP switch bank (SW4) to match
In the following table, up and down indicates the position of the switch with the
board orientation as shown in
Table 4–3. SW4 JTAG DIP Switch Settings
Switch
1
2
3
4
Cyclone V SoC Development Kit
User Guide
Board
Label
Switch 3 has the following options:
MSEL2 ON (up) = MSEL2 is 0.
■
OFF (down) = MSEL2 is 1.
■
Switch 4 has the following options:
MSEL3 ON (up) = MSEL3 is 0.
■
OFF (down) = MSEL3 is 1.
■
Switch 5 has the following options:
MSEL4 ON (up) = MSEL4 is 0.
■
OFF (down) = MSEL4 is 1.
■
Board
Label
ON (up) = Do not Include HPS in the JTAG chain.
■
HPS
OFF (down) = Include HPS in the JTAG chain
■
ON (up) = Do not Include the FPGA in the JTAG
■
chain.
FPGA
OFF (down) = Include the FPGA in the JTAG chain.
■
ON (up) = Do not include the HSMC connector in the
■
JTAG chain.
HSMC
OFF (down) = Include the HSMC connector in the
■
JTAG chain.
ON (up) = Do not include the MAX V system
■
controller in the JTAG chain.
MAX
OFF (down) = Include the MAX V system controller in
■
the JTAG chain.
Chapter 4: Development Board Setup
Factory Default Switch and Jumper Settings
Function
Table 4–3 and
Figure 4–1.
Function
Default
Position
ON
ON
ON
Figure 4–1.
Default
Position
OFF
OFF
ON
OFF
May 2013 Altera Corporation