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2.10 Watch-Dog Timer
There are three access cycles of Watch-Dog Timer as Enable, Refresh
and Disable. The Enable cycle should proceed by READ PORT 443H.
The Disable cycle after a first Enable cycle means Refresh.
Once if the Enable cycle activity, a Refresh cycle is request before the
time-out period for restart counting the WDT's period. Otherwise, it will
assume that the program operation is abnormal when the time counting
over the period preset of WDT Timer. A system reset signal to start again
or a NMI cycle to the CPU comes if over.
The JP8 is using for select the active function of Watch-Dog Timer in
disable the Watch-Dog Timer, or presetting the Watch-Dog Timer
activity at the reset trigger, or presetting the Watch-Dog Timer activity at
the NMI trigger.
JP8： ： ： ： Time of Watch-Dog
Period
*1 sec
2 sec
10 sec
20 sec
110 sec
220 sec
JP10： ： ： ： Watch-Dog Active Type Setting
JP8
*1-2
2-3
OFF
The Watch-Dog Timer is disabled after the system Power On. The
Watch-Dog Timer can be enabled by a Enable cycle with reading the
control port (443H), a Refresh cycle with reading the control port (443H)
and a Disable cycle by reading the Watch-Dog Timer disable control port
(043H). After a Enable cycle of WDT, user must constantly proceed a
16
1-2
3-4
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
ON
OFF
ON
OFF
Description
System Reset
Active NMI
Disable
5-6
7-8
ON
OFF
ON
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
ON
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