Initial Reset; Prom, Ram; I/O Memory; Oscillation Circuit - Epson S1C6P366 Technical Manual

Cmos 4-bit single chip microcomputer
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6.1.4 Initial reset

When the power is turned on, the reset terminal must be set at Low level until the supply voltage rises to
the Vsr level.
The Vsr voltage level is different:
S1C63358:
Vsr = 1.4 V
S1C6P366:
Vsr = 2.7 V
Furthermore, S1C6P366 uses the initial reset signal as a trigger for setting either the normal operation
mode or the programming mode. Therefore, design the reset input circuit so that the IC will be reset for
sure. Initial resetting during operation is the same as the S1C63358.
When resetting the IC in the normal operation mode, make sure to fix the SPRG terminal at High level or
leave open.

6.1.5 PROM, RAM

The S1C6P366 employs a Flash EEPROM for the internal PROM. The Flash EEPROM can be rewritten up
to 100 times. Rewriting data is done at the user's own risk.
Table 6.1.5.1 lists the code PROM and RAM sizes of the S1C6P366 and the S1C63358.
When developing an application for the S1C63358, pay attention to the memory size.

6.1.6 I/O memory

The DBON register (FF01H•D0) exists in the I/O memory of the S1C6P366 in order to develop an
S1C63158 application. This register does not exist in the S1C63358. In the S1C63P336, this register func-
tions as a general-purpose register.

6.1.7 Oscillation circuit

In the S1C6P366, only crystal oscillation is available for the OSC1 oscillation circuit and either ceramic or
CR oscillation is available for the OSC3 oscillation circuit. The OSC1 CR oscillator option allowed in the
S1C63358 cannot be selected.
Furthermore, pay attention to the difference on the oscillation start time according to the supply voltage.
Be sure to have enough margin especially for stabilizing the OSC3 oscillation when controlling the
peripheral circuit that uses the OSC3 clock.
S1C6P366 TECHNICAL MANUAL
Vsr
V
DD
RESET
Power on
Fig. 6.1.4.1 Initial reset at power-on
Table 6.1.5.1 Memory size
Memory
S1C6P366
16,384 × 13 bits
Code PROM
2,048 × 4 bits
Data RAM
EPSON
CHAPTER 6: DIFFERENCES FROM MASK ROM MODELS
2.0 msec or more
0.5•V
DD
0.1•V
or less (low level)
DD
S1C63358
8,192 × 13 bits
512 × 4 bits
109

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