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CHS0, CHS1: Analog input channel selection register (FFD0H•D0, D1)
Selects an analog input channel.
At initial reset, this register is set to "0" (AD0).
VADSEL: A/D power source selection register (FF01H•D3)
In the S1C6P366, the value set in this register does not affect the operating mode (operating voltage) of
the A/D converter. However, when using the S1C6P366 as a development tool for the S1C63358/63158,
control the operating voltage using this register according to the control sequence of the model (refer to
the "Technical Manual").
At initial reset, this register is set to "0" (V
ADRUN: A/D conversion control (FFD0H•D3)
Starts an A/D conversion.
When "1" is written: Start
When "0" is written: No operation
Reading: Invalid
When "1" is written to ADRUN, the A/D converter starts A/D conversion of the channel selected by the
CHS register and stores the conversion result to the ADDR register.
At initial reset, this bit is set to "0".
ADDR0–ADDR7: A/D conversion result (FFD2H/lower 4 bits, FFD3H/upper 4 bits)
A/D conversion result is stored.
ADDR0 is the LSB and ADDR7 is the MSB.
At initial reset, data is undefined.
EIAD: A/D converter interrupt mask register (FFE7H•D0)
This register is used to select whether to mask the A/D converter interrupt or not.
When "1" is written: Enabled
When "0" is written: Masked
Reading: Valid
Writing "1" to the EIAD register enables the A/D converter interrupt and writing "0" disables the inter-
rupt.
At initial reset, this register is set to "0".
S1C6P366 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
Table 4.11.6.2 Selection of analog input channel
CHS1
CHS0
1
1
1
0
0
1
0
0
).
DD
EPSON
Input channel
AD3 (P43)
AD2 (P42)
AD1 (P41)
AD0 (P40)
87
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