Epson S1C6P366 Technical Manual page 129

Input port
(1) When input ports are changed from low to high by pull-up resistors, the rise of the waveform is
delayed on account of the time constant of the pull-up resistor and input gate capacitance. Hence,
when fetching input ports, set an appropriate waiting time.
Particular care needs to be taken of the key scan during key matrix configuration.
Make this waiting time the amount of time or more calculated by the following expression.
10 × C × R
C: terminal capacitance 5 pF + parasitic capacitance ? pF
R: pull-up resistance 300 kΩ
(2) The K13 terminal functions as the clock input terminal for the programmable timer, and the input
signal is shared with the input port and the programmable timer. Therefore, when the K13 terminal is
set to the clock input terminal for the programmable timer, take care of the interrupt setting.
Output port
(1) When using the output port (R02, R03) as the special output port, fix the data register (R02, R03) at "1"
and the high impedance control register (R02HIZ, R03HIZ) at "0" (data output).
Be aware that the output terminal is fixed at a low (V
written to the R02 and R03 registers when the special output has been selected.
Be aware that the output terminal shifts into high impedance status when "1" is written to the high
impedance control register (R02HIZ, R03HIZ).
(2) A hazard may occur when the FOUT signal and the TOUT signal are turned ON and OFF.
(3) When f is selected for the FOUT signal frequency, it is necessary to control the OSC3 oscillation
OSC3
circuit before output. Refer to Section 4.3, "Oscillation Circuit", for the control and notes.
I/O port
When in the input mode, I/O ports are changed from low to high by pull-up resistor, the rise of the
waveform is delayed on account of the time constant of the pull-up resistor and input gate capaci-
tance. Hence, when fetching input ports, set an appropriate wait time.
Particular care needs to be taken of the key scan during key matrix configuration.
Make this waiting time the amount of time or more calculated by the following expression.
10 × C × R
C: terminal capacitance 5 pF + parasitic capacitance ? pF
R: pull-up resistance 300 kΩ
LCD driver
(1) The contents of the display memory are undefined until the area is initialized (through, for instance,
memory clear processing by the CPU). Initialize the display memory by executing initial processing.
(2) 100 msec or more time is necessary for stabilizing the LCD drive voltages V
LCD power control register LPWR to "1". Be careful of the segment-on right after the power is turned on.
Clock timer
Be sure to read timer data in the order of low-order data (TM0–TM3) then high-order data (TM4–
TM7).
Programmable timer
(1) When reading counter data, be sure to read the low-order 4 bits (PTD00–PTD03, PTD10–PTD13) first.
Furthermore, the high-order 4 bits (PTD04–PTD07, PTD14–PTD17) should be read within 0.73 msec of
reading the low-order 4 bits (PTD00–PTD03, PTD10–PTD13).
For the 16 bit × 1 mode, be sure to read as following sequence:
(PTD00–PTD03) → (PTD04–PTD07) → (PTD10–PTD13) → (PTD14–PTD17)
The read sequence time should be within 1.46 msec.
S1C6P366 TECHNICAL MANUAL
) level the same as the DC output if "0" is
SS
EPSON
CHAPTER 7: SUMMARY OF NOTES
, V and V after setting the
C1 C2 C3
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