Specifications - Renesas R0E3308B0EPB00 User Manual

Table of Contents

Advertisement

R0E3308B0EPB00 User's Manual

1.4 Specifications

Tables 1.5 and 1.6 list the specifications of the R0E3308B0EPB00.
Table 1.5 R0E3308B0EPB00 specifications (1/2)
Applicable MCUs
Evaluation MCU
Usable mode
Maximum operating frequency*
Applicable power supply
Basic debugging functions
Real-time trace function
Real-time RAM monitor function
Hardware break function
Execution time measurement function
C0 coverage
External trigger input/event output
Expansion emulation memory
Maximum operating frequency
Specifiable areas
Area size
Emulation memory size
Specifiable bank
* Note on Using This Product
• If using this product when the voltage of VCC1 is higher than that of VCC2, VCC1 and VCC2 should be within the
following range:
4.8V ≤ VCC1 ≤ 5.2V and 3.0V ≤ VCC2 < VCC1
This precaution only need to be observed when using an emulator, and does not apply for the actual MCU.
R20UT0210EJ0200 Rev.2.00
Sep 16, 2010
M32C/8B Group
M308B8FGGP
ROM size: 256 KB + 8 KB, RAM size: 32 KB
Single-chip mode
Memory expansion mode
Microprocessor mode
VCC1 = VCC2 = 3.0 to 5.5 V: 32 MHz
Dual-power supply specification
(4.8 V ≤ VCC1 ≤ 5.2 V and 3.0 V ≤ VCC2 < VCC1): 32MHz
3.0 to 5.5 V
- Download
- Software break (max. 64 points)
- Program execution/stop (allows free-run execution supporting software breaks)
- Memory reference/setting (reference/setting C-variables, run-time execution)
- Register reference/setting
- Disassemble display
- C-level debugging, etc.
- 256K-cycle bus information recordable
(Bus, external trigger, time stamp)
- 5 trace modes supported (Break/Before/About/After/Full)
- Can be recorded ON/OFF by events
- 4,096 bytes (256 bytes x16)
- Data/last access result
8 points (Execution address, bus detection, interrupt, external trigger signal)
Time between program start and stop
Maximum/minimum/average execution time and pass count of specified four
zones.
Count clock: Equal to MCU Clock or 16 MHz
8,192 KB (256 KB x 32 blocks)
External trigger input (MCU-dependent-voltage CMOS level x8) or event output
(break x1, event x7)
-
32 MHz 1Φ + 1Φ
Max. 4 areas
Contiguous 256 KB range or contiguous 1 MB range
(mixed setting of 256 KB range and 1 MB range is available)
4 MB for 4 areas
- For area size 256 KB
X0h, X4h, X8h, XCh banks
e.g.) 20 bank, 64 bank, A8 bank, EC bank etc.
- For area size 1 MB
X0h hank
e.g.) 20 bank, 40 bank, 80 bank, A0 bank etc.
1. Outline
Page 18 of 98

Advertisement

Table of Contents
loading

Table of Contents