Write Operations - Analog Devices dBCool ADT7473 Manual

ADT7473
1
SCL
SDA
0 1
START BY
MASTER
1
SCL
0 1
SDA
START BY
MASTER
It is possible to read a data byte from a data register withou
firs writing to the address pointer register, if the address t
point er register is alread y at the correct value. However, it is not
possible to write data to a register without writing to the
address pointer register, because the first data byte of a write is
always written to the address pointer register.
In addition to supporting t he send byte and receive byte
protocols, the ADT7473 also supports the read byte protocol.
(See System Management Bus Specifications Rev. 2 for more
information; this document is available from In l.)
If several read or write operations must be performed in succes-
sion, the master can send a repeat start condition instead of a
stop condition to begin a new operation.

WRITE OPERATIONS

The SMBus specification defines several
read and write operations. The ADT7473 uses the following
SMBus write protocols. The following abbreviations are use
the diagrams:
S – START
P – STOP
R – READ
W – WRITE
A – ACKNOWLEDGE
A – NO ACKNOWLEDGE
Sen d Byte
In th is operation, the master device sends a single command
byte to a slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
write bit (active low).
3. The addressed slave device assert
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master asserts a stop condition on SD
transaction ends.
0 1 1 1 0
FRAME 1
SERIAL BUS ADDRESS BYTE
Figure 15. Writing to the Address
0 1 1 1 0
FRAME 1
SERIAL BUS ADDRESS BYTE
Figure 16. Reading Data from a Pre
te
protocols for various
s ACK on SDA.
A and the
9 1
D6
R/W D7 D5 D4
ACK. BY
ADT7473
ADDRESS POINTER REGISTER BYTE
Pointer Register Only
9 1
D7 D6 D5
R/W
ACK. BY
ADT7473
DATA BYTE FROM ADT7473
viously Selected Register
t For the ADT7473, the send byte protocol is
register address to RAM for a subsequent single-byte read from
the same address. This operation is illustrated in Figure 17.
Figure 17. Setting a Register Address for Subsequent Read
If the master is required to read data from the register immedi
ately after setting up the address, it can assert a repeat start
condition immediately after the final ACK and carry out a
single-byte read without asserting an intermediate stop
condition.
Write Byte
In this operation, the master device sends a command byte and
one data byte to the slave device, as follows:
1. The master device
d in
2. The master sends the 7-bit slave address followed by the
write bit (active low).
3. The addressed slave device asserts ACK on SDA.
4. Th e master sends a command code.
5. The slave asserts ACK on SDA.
6. The master
7. The slave asserts ACK on SDA.
8. The master asserts a stop condition on
transaction
The single byte write operation is illustrated in Figure 18.
1
S
Rev. A | Page 12 of 76
9
D2
D3 D1 D0
ACK. BY
ADT7473
FRAME 2
D4 D3 D2 D1
D0
NO ACK. BY
MASTER
FRAME 2
1 2 3 4
SLAVE REGISTER
S W A
ADDRESS ADDRESS
asserts a start condition on SDA.
sends a data byte.
en ds.
2 3 4 5
SLAVE REGISTER
ADDRESS W A A
ADDRESS
Figure 18. Single-Byte Write to a Register
STOP BY
MASTER
9
STOP B Y
MASTE R
used to write a
5 6
A P
-
SDA, and the
6 7 8
DATA A P