Analog Devices dBCool ADT7473 Manual page 61

Table 19. Temperature Reading Registers (Power-On Default = 0x01)
Reg ist er Addr ss e R/W
0x25 Read only
0x26 Read only
0x27 Read only
1
These temperatur e readi ng s can be in twos com
2
If the extended re solution bits of these readings a
resolution registe rs have b een read, all associated
3
In twos compleme nt mo de , a temperature readi
4 In Offset 64 mode, a tem pe rature reading of −64
Table 20. Fan Tachometer R
Register Address R/W
0x28 Read only
0x29 Read only
0x2A Read only
0x2B Read only
0x2C Read only
0x2D Read only
0x2E Read only
0x2F Read only
1
These registers co unt the n umber of 11.11 µs pe
The number of TA CH pu lse s used to count can be ch
measured. Becaus e a vali d f an tachometer reading
read. At power-on, these re gisters contain 0x0000 u
while the fans are spinni ng up. A count of 0xFFFF in
•
Stalled or bl ocked bject jamming the fan). (o
•
Failed (inter nal circ try destroyed). ui
•
Not populated. (Th e ADT7473 e
be set to 0xF FFF.)
•
Alternate function, fo r example, TACH4 reconfigured as THERM pin.
Table 21. Curr nt PWM Duty Cycle Re e
Register Addre ss R/W
0x30 R/W
0x31 R/W
0x32 R/W
1
These registers re flect th e PWM duty cycle driving e
back through the se regist e rs. The PWM duty cycle va
report back 0x00. I n soft wa re mode, the PWM duty
Table 22. Operating Point Registers (Power-On Default = 0xA4)
Regist er Address R/W
0x33 R/W
0x34 R/W
0x35 R/W
1 These registers set the target op erating
2 The fa ns being controlled are ad justed
3
These registers become read-only
Description
Remote 1 temperature reading
Local temperature reading (8 MSB of reading).
Remote 2 temperature reading (8 MSB of reading).
plement or Offset 64 format; this interpretation is
re also being read, the extended resolution regist
MSB reading registers are frozen until read. Both
ng of −128°C (0x80) indicates a diode fault (open o
°C (0x00) indicates a diode fault (open or short) on
eading Registers (Power-On De
Description
TACH1 low byte.
TACH1 high byte.
TACH2 low byte.
TACH2 high byte.
TACH3 low byte.
TACH3 high byte.
TACH4 low byte.
TACH4 high byte.
riods (based on an internal 90 kHz clock) that occu
anged using the TACH pulses per revolution r
requires that two bytes are read, the low byte m
ntil the first valid fan TACH measurement is rea
dicates a fan is one of the following:
xpects to see a fan connected to each TACH. If a fan is not connected to that TACH, its TACH minimum high and low byt
gisters (Power-On Default = 0x00)
Description
PWM1 current duty cycle (0% to 100
PWM2 current duty cycle (0% to 100
PWM3 current duty cycle (0% to 100
ach fan at any given time. When in automatic fa
lues vary according to temperature in automa
cycle outputs can be set to any duty cycle value
3
Description
Remote 1 operating point register (default = 100°C).
Local temperature operating point register (default = 100°C).
Remote 2 operating point register (default = 100°C).
point for each temperature channel when the dynamic T
to maintain tem perature about an operating point.
whe n the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to these registers fail.
1, 2
3, 4
(8 MSB of reading).
determined by Bit 0 o
ers (Reg. 0x76, 0x77)
the extended resolu
r short) on that chann
that channel.
1
fault = 0x00)
r between a number of con
egister (Register 0x7B). T
ust be read first. Both th
d into these registers. Th
1
% duty cycle = 0x
% duty cycle = 0x
% duty cycle = 0x00
n speed control mode, t
tic fan speed control mo
by writing to these register
1, 2, 3
control feature is enabled.
MIN
Rev. A | Page 61 of 76
ADT7473
f Configuration Register 5 (0x7C).
must be read first. Once the extended
tion registers and the MSB registers are frozen.
el.
secutive fan TACH pulses (default = 2).
his allows the fan speed to be accurately
e low and high bytes are then frozen until
is prevents false interrupts from occurring
00 to 0xFF).
00 to 0xFF).
to 0xFF).
he ADT7473 reports the PWM duty cycles
de. During fan start up, these registers
s.
es should