Serial Bus Interface - Analog Devices dBCool ADT7473 Manual

Remote thermal monitor and fan controller
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SERIAL BUS INTERFACE

On PCs and servers, control of the ADT7473 is carri
using the SMBus. The ADT7473 is connected to this bus as a
slave device, under the control of a master controller, which is
usually (but not necessarily) the ICH.
The ADT7473 has a fixed 7
-bit serial bus address of 0101110
or 0x2E. The read/write bit must be added to get the 8-bit
address (01011100 or 0x5C). Data is sent over the serial bus in
sequences of nine clock pulses: eight bits of data followed by an
acknowledge b
it from the slave device. Transitions on the data
line must oc
cur during the low period of the clock signal and
remain stab
le during the high period, because a low-to-high
transition w
hen the clock is high might be interpreted as a stop
signal. The nu
mber of data bytes that can be transmitted over
the serial bus in a single
read or write operation is limited only
by what the master and slave
When all dat
a bytes have been read or written, stop conditions
are established. In write mode, the master pulls the data line
high during the tenth clock pulse
rea mode, the master device overrides the acknowledge b
d
pulling the data line high during the low period before the
ninth
clock pulse; this is kn
own as No Acknowledge. The
ma er takes the data line low during the low period be
st
ten
th
clock pulse, and then high during th
ass t a stop condition.
er
An number of bytes of data can be transferred over the se
y
bu n one operation, but it is not possible to mix read and
s i
in one operation, because the type of operation is determine
the beginning and cannot subsequently be changed without
starting a new operation.
1
SCL
SDA
0
START BY
MASTER
Figur
e 14. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
ed out
devices can handle.
to assert a stop condition. In
fore the
e tenth clock pulse to
1
0
1
1
1
0
FRAME 1
SERIAL BUS ADDRESS BYTE
SCL (CONTINUED)
SDA (CONTINUED)
In t e ADT7473, write operations c
h
byt , and read operations contain on
es
one of the device data registers or read data from it, the add
po ter register must be set so the correct data register is
in
address
ed, and then da
read from it. The first byte of a write operation always cont
an address that is stored in the address pointer register. If data is
written to the d
byte that is written to the register selected by the address
pointer register.
This write operation is shown in Figure 14. The device address
is sent over the bus, and then R/ W
by two data bytes. The first data byte is the address of the
internal data register to be written to, which is stored in the
address pointer register. The second data byte is the data to be
written to the internal data register.
When reading data from a register, there are two possibilities:
If the ADT7473's address pointer register value is unknown
or not the desired value, it must first be set to the correct
it by
value before data can be read from the desired data register.
This is done by performing a write to the ADT7473, but
only the data byte containing the register address is sent,
because no data is written to the register. This is shown in
Figure 15.
A read operation is then performed consisting of the serial
rial
bus address, R/ W bit set to 1, followed by the data byte
write
read from the data register. This is shown in Figure 16.
d at
If the address pointer register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the address pointer
register, as shown in Figure 16.
9
1
D6
D7
D5
R/W
ACK. BY
ADT7473
ADDRESS POINTER REGISTER BYTE
1
D5
D4
D7
D6
DATA BYTE
Rev. A | Page 11 of 76
ontain either one or two
e byte. To write data to
ta can be written into that register or
evice, the write operation contains
is set to 0. This is followed
D2
D4
D3
D1
D0
ACK. BY
ADT7473
FRAME 2
9
D3
D2
D1
D0
ACK. BY
ADT7473
FRAME 3
ADT7473
ress
ains
a second data
9
STOP BY
MASTER

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