Basic Wdt - Infineon XMC7000 Series Using Manual

Using the Watchdog Timer in XMC7000 family MCUs

Basic WDT

2 Basic WDT
Figure 2 shows the block diagram of the Basic WDT. It supports one 32-bit free-running counter that counts up
with the ILO0 clock if the ENABLE [31] bit is set to '1' in the WDT_CTL register.
Operation during Hibernate mode is possible because the WDT logic and ILO0 are supplied by the external high-
voltage supply (V ). A WDT reset restores the chip to Active mode. By default, the Basic WDT is enabled,
DDD
UPPER_ACTION is configured as reset, UPPER_LIMIT is set with the value 0x8000, and all protectable registers
are locked. UPPER_ACTION and UPPER_LIMIT are configuration registers that are used to define the behavior of
the Basic WDT in case it is not serviced in time and if a reset should be executed.
WDT configuration registers are in a protection region separate from the register that is used to service it.
Protection regions are handled by the Peripheral Protection Unit (PPU). See the CPU Subsystem (CPUSS)
chapter in the Architecture TRM
ILO0
CTL_ENABLE
Debug_active
SERVICE
(Write from
Firmware)
Figure 2 Basic WDT block diagram
Depending on the configuration in the WDT_CONFIG register, an interrupt or a reset event can be generated
when the counter reaches related counter limits. Three threshold limits can be used for the following actions:
LOWER-LIMIT: If the LOWER_ACTION[0] bit is set to '1' in the WDT_CONFIG register, a reset is issued when
•
the watchdog routine is serviced before the WDT reaches the LOWER_LIMIT value.
UPPER-LIMIT: If the UPPER_ACTION[4] bit is set to '1' in the WDT_CONFIG register, a reset is issued when the
•
WDT reaches the UPPER_LIMIT value before the WDT is serviced.
WARN-LIMIT: If the WARN_ACTION[8] bit is set to '1' in the WDT_CONFIG register, an interrupt is issued when
•
the WDT reaches the WARN_LIMIT value.
UPPER-LIMIT and LOWER-LIMIT in combination are used to build the window mode for the Basic WDT.
Depending on the Basic WDT mode defined by the ACTION bits in the WDT_CONFIG register, servicing of the
watchdog counter must be handled differently. In window mode, the firmware must ensure adequate
Application Note
for more information.
WDT (32-bit Up-Counter)
WDT_CNT
EN
Debug
Count = 0 Count
32
WDT_CONFIG
WARN
ACTION
Count < LOWER_LIMIT
Count == WARN_LIMIT
Count >= UPPER_LIMIT Count == 3
4 of 33
UPPER LOWER
ACTION ACTION
RESET
INTERRUPT
002-33887 Rev. *A
2022-05-25