Debug Support - Infineon XMC7000 Series Using Manual

Using the Watchdog Timer in XMC7000 family MCUs

Debug support

4 Debug support
Both types of WDTs support different debug modes. The configuration is done with the
DEBUG_TRIGGER_ENABLE[28] and DEBUG_RUN[31] bits, which are both located in the related CONFIG register
for basic WDT and MCWDT. The WDT reset request is blocked during debug modes, while debugging through
MCWDT reset is possible using breakpoints during debug modes.
Table 5 Debug modes
DEBUG_RUN
0
0
1
Note: In each case, no reset or FAULT is issued when the debugger is connected to the target system.
To pause at a breakpoint while debugging, configure the trigger matrix to connect the related 'CPU halted'
signal to the trigger input for the related WDT. It takes up to two LFCLK cycles for the trigger signal to be
processed. Triggers that are less than two LFCLK cycles may be missed. Synchronization errors can accumulate
each time it is halted.
Application Note
DEBUG_TRIGGER_ENABLE
0
1
X
Description
Counter is stopped when a debugger is connected.
Counter is stopped only when a debugger is
connected and the CPU is halted during a breakpoint.
Counter is running when debugger is connected. No
reset is issued when the CPU is halted during a
breakpoint but the counter is not stopped.
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2022-05-25