Selecting The Cpu; Mcwdt Settings - Infineon XMC7000 Series Using Manual

Using the Watchdog Timer in XMC7000 family MCUs
Multi-counter WDT
3.6

Selecting the CPU

In a multi-CPU system, you should assign one MCWDT to a dedicated CPU to select the SLEEPDEEP for
controlling the counter behavior in the respective CPU low-power mode. The counter pauses while the
respective CPU is in a low-power mode if the SLEEPDEEP_PAUSE[30] bit is set to '1' in the CTR2_CONFIG
register.
A single MCWDT is not intended to be used simultaneously by multiple CPUs because of the complexity
involved in coordination.
CPU_SEL[1:0] bits in the CPU_SELECT register are defined in
Table 3 MCWDT assignment to cores
CPU_SEL[1:0]
0
1
2
3.7

MCWDT settings

Figure 10 illustrates an example flow to configure the MCWDT.
Application Note
CPU
CM0+
CM7_0
CM7_1
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Table 3.
002-33887 Rev. *A
2022-05-25