Using the Watchdog Timer in XMC7000 family MCUs
Basic WDT
UPPER_LIMIT = 0x8000
LOWER_LIMIT = 0x1000
Figure 6
Example of servicing the basic WDT in window mode
2.8.1
Use case
This section describes an example of clearing the basic WDT using the use case discussed in
2.8.2
Example flow to clear the basic WDT
Figure 7
shows an example flow to clear the basic WDT.
Figure 7
Example flow to clear the basic WDT
2.9
Reset cause indication for the basic WDT
If the basic WDT is not serviced or serviced too early, a system-wide reset is issued. The reset event is stored in
the RESET_WDT[0] bit in the RES_CAUSE register.
Note:
The hardware clears this bit during power-on reset (POR). It cannot be distinguished whether a
reset was caused by a LOWER_LIMIT or UPPER_LIMIT violation.
Application Note
Counts value
0xFFFFFFFF
SERVICE
Sequence 1:
750ms
125ms
100ms
300ms
200ms
150ms
12 of 33
SERVICE
SERVICE
Sequence 2:
Sequence 3:
250ms
450ms
100ms 150ms
100ms 150ms
200ms
100ms
Time
...
300ms
2.7.1
Use case.
002-33887 Rev. *A
2022-05-25