RadiSys PROCELERANT CE915GMA Product Manual page 51

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First BIOS notebook (Pro) checkpoint codes
Checkpoint Code Description
01h IPMI Initialization.
02h Verifies that CPU is in real mode from cold start.
03h Disables NMIs.
04h Gets CPU type from CPU registers.
06h Miscellaneous hardware initialization.
07h Disables system ROM shadow and start to execute from the flash device.
08h Initializes chipset registers to power-on defaults.
09h Sets In-POST bit in CMOS.
0Ah Completes any implementation-specific CPU initialization.
0Bh Enables L1 cache during POST.
0Ch Initializes cache(s).
0Fh Disables IDE operation.
11h Alternates register initialization.
12h Restores contents of CR0 following CPU reset
13h Resets PCI devices in early post.
14h Initializes and configures the keyboard controller.
16h Verifies ROM BIOS checksum.
17h Initializes external cache before memory auto size.
18h Initializes the timers.
1Ah Tests the DMA registers.
1Ch Initializes interrupt controllers for some shutdowns.
20h Verifies DRAM refresh.
22h Initializes the Keyboard Controller for Keyboard Test.
24h Sets 4GB segments for DS,ES,FS,GS,SS.
28h Sizes DRAM.
29h Initializes the POST Memory Manager.
2Ah Zeroes the RAM up to the minimum RAM specified in the chipset RAM table.
2Ch Tests address lines of the RAM.
2Eh Tests the first 4MB of RAM.
2Fh Initializes external cache before shadowing.
32h Computes CPU clock speed in MHz.
33h Initializes the Phoenix Dispatch Manager.
34h Tests the CMOS RAM and RTC (S2D)
36h Vector to the proper shutdown routine.
38h Shadows system BIOS ROM.
3Ah Auto sizes the external cache.
3Ch Advanced chipset configuration.
3Dh Alternates register configuration.
42h Initializes interrupt vectors.
45h POST device initialization.
46h Verifies that the copyright message is intact.
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POST 80 codes
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