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RadiSys EPC-9 Hardware Reference Manual

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RadiSys EPC-9 Hardware Reference Manual

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  • Page 1 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...
  • Page 2 ® Hardware Reference ® RadiSys Corporation 5445 NE Dawson Creek Drive Hillsboro, OR 97124 Phone: (503) 615-1100 Fax: (503) 615-1150 http://www.radisys.com _____________________________________________________________________ 07-0877-00 April 1997 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 3 Microsoft and MS-DOS are registered trademarks of Microsoft Corporation. Motorola is a registered trademark of Motorola, Inc. PhoenixBIOS and NuBIOS are trademarks of Phoenix Technologies, Ltd. RadiSys and EPC are registered trademarks and EPConnect is a trademark of RadiSys Corporation. April 1997 Copyright ©...

  • Page 4: Table Of Contents

    Power Supply Requirement Specifications ..........1-8 Additional Specifications................1-8 CHAPTER 2 - Configuration and Installation Configuring the EPC-9 ..................2-2 Slot-1 Functionality..................2-2 Selecting the EPC-9 Slot Location ..............2-3 Installing the VMEbus Backplane Jumpers ............2-3 EPC-9 Insertion ....................2-8 Connecting Peripherals to the EPC-9..............2-9 Remaining Steps....................2-9 CHAPTER 3 - BIOS Configuration Introduction ......................3-1...
  • Page 5 EPC-9 Organization....................4-2 Block Diagram ...................4-3 Processor Module Daughterboard..............4-4 I/O Motherboard ..................4-9 PMC-1 Video Module................4-13 Front Panel LEDs..................4-14 Resetting the EPC-9 ...................4-15 EXM Expansion Interface ..................4-16 Notes on Byte Ordering..................4-16 CHAPTER 5 - Programming the VMEbus Interface Overview ......................5-1 Register Initialization ..................5-1 Programming the Universe .................5-1...
  • Page 6 EPC-9 Hardware Reference DMA Page Registers ..................A-2 Port A .........................A-2 EXM Configuration....................A-3 Second Interrupt Controller ................A-3 Power Management Controller................A-3 DMA Controller ....................A-3 Coprocessor Interface ..................A-3 IDE Control ......................A-4 ISA Plug and Play....................A-4 Serial I/O (COM B) Port ..................A-4 Parallel I/O (LPT1) Port ..................A-4 EPP Registers .....................A-4...
  • Page 7 BP9E2 Subplane....................D-4 BP9E2M Subplane .....................D-5 BP9E4 Subplane....................D-6 BP9E4M Subplane .....................D-7 Appendix E - Registers Registers Specific to the EPC-9................E-1 Register Details ....................E-3 VXI Register Details ..................E-8 VXI Register Base Address Decoding..............E-13 Appendix F - Glossary ....................F-1 Appendix G - SVGA and the PMC-1 Video Module Video Controller Hardware ................G-1...
  • Page 8 EPC-9 Hardware Reference List of Illustrations Figure 2-1. Daisy-Chain Signal Concept............2-4 Figure 2-2. Backplane Jumpers Required for EPC-9 Subsystem....2-5 Figure 2-3. VME Jumpers on Rear Wirewrap Pins ........2-6 Figure 2-4. VME Jumpers on Front Stake Pins..........2-7 Figure 3-1. BIOS Setup Menu Map...............3-2 Figure 3-2.
  • Page 9 EPC-9 Hardware Reference List of Tables Table 1-1. EPC-9 Environmental Specifications..........1-7 Table 1-2. Power Supply Requirement Specifications.........1-8 Table 1-3. Additional EPC-9 Specifications ..........1-8 Table B-1. Interrupts..................B-1 Table B-2. DMA Channels ................B-2 Table C-1. Keyboard Pin-Out...............C-3 Table C-2. Mouse Pin-Out................C-3 Table C-3.

  • Page 10: Chapter 1 - Product Description

    Purpose This manual was written to provide detailed hardware reference information for OEMs, system integrators, and others who use the EPC-9 as a component of their VMEbus systems. The reader should be able to install the EPC-9 and configure the BIOS and the PMC-1 Video Module based on the information in this manual.
  • Page 11 BIOS Configuration. Describes the process of BIOS configuration using the built-in BIOS setup menus. Chapter 4 Theory of Operation. Describes how the components of the EPC-9 operate to provide a ISA/PCI/VMEbus compatible embedded computer with standard PC peripherals and PCI, VME, and EXMbus interfaces.

  • Page 12: Overview

    Product Description Overview The EPC-9 is a highly integrated PC-compatible computer designed for use in the VMEbus and has VXIbus (VMEbus Extensions for Instrumentation) extensions, with interfaces to the PCIbus and EXMbus. It is a two-slot 6U VMEbus module, with support for two PCI Mezzanine Cards (PMC).
  • Page 13 EPC-9 Hardware Reference Additional features (some optional) include: • SVGA interface. This PCIbus interface is based on the Cirrus Logic GD5446 chip, with up to 2MB of video RAM providing local bus graphics performance and resolutions up to 1280x1024, with 64K colors.

  • Page 14: Vmebus

    VMEbus. All the VMEbus address spaces can be addressed from both protected-mode and real-mode operating systems. The EPC-9 can generate or respond to all 7 standard VMEbus interrupts, and can also receive the VMEbus signals ACFAIL, BERR, and SYSFAIL as interrupts. The EPC-9 implements 16-bit IACK cycles when it generates interrupts.
  • Page 15 EPC-9 Hardware Reference The EPC-9 includes a complete set of VXIbus-defined message-based device registers. These registers are implemented in a proprietary gate array and mapped into the VMEbus A16 address space and include a device-type identifier register, bus status and control registers, and a register-based message passing facility.

  • Page 16: Specifications

    Product Description Specifications Environmental Specifications The following are the environmental specifications for the EPC-9. Characteristic Value Temperature operating 100MHz: 0-60°C at point of entry of forced air derated 2°C per 1000 ft (300 m) over 6600 ft (2000 m) 133MHz: 0-60°C at point of entry of forced air derated 2°C per 1000 ft (300 m) over...

  • Page 17: Power Supply Requirement Specifications

    The following table contains power supply requirement specifications. Power Supply Requirements +5V Vcc Current (ma) 11.6 A Max. (166MHz Processor, 256MB DRAM) +12V 0.2 A Max. Table 1-2. EPC-9 Power Supply Requirement Specifications. Additional Specifications The following table contains other specifications: Characteristic Value Mechanical...
  • Page 18 4076 - RadiSys Corporation code model code 101Fh (if configured for slot 0) 111Fh (if configured for other than slot 0) Table 1-3 (continued). Additional EPC-9 Specifications. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 19 EPC-9 Hardware Reference Notes 1-10 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 20: Chapter 2 - Configuration And Installation

    Chapter 2 - Configuration and Installation In order to configure and install the EPC-9, the following steps must be completed: Step Action See Chapter Select the slot location Install VMEbus backplane jumpers Insert subplane into mainframe Insert EPC-9 into mainframe...

  • Page 21: Configuring The Epc-9

    Slot-1 and becomes the system controller. The EPC-9 will always power up in non- system controller mode and sample BG3IN* to determine whether or not it is to be system controller. When the EPC-9 is configured as the Slot-1 controller, it performs all the standard VMEbus system control functions.

  • Page 22: Selecting The Epc-9 Slot Location

    • If the EPC-9 is to function as system controller, it must be placed in Slot-1. The VMEbus specification, Rule 3.3, states that the Slot-1 controller must be in Slot 1. All other boards must be to the right of the Slot-1 controller.

  • Page 23: Figure 2-1. Daisy-Chain Signal Concept

    EPC-9 Hardware Reference xxxIN xxxIN xxxIN xxxIN xxxOUT xxxOUT xxxOUT xxxOUT VMEbus Slots Figure 2-1. Daisy-Chain Signal Concept. The daisy-chain signal concept is shown in Figure 2-2. The Slot-1 controller board initiates each daisy-chain signal. Each VMEbus slot to the right of the Slot-1 controller, as viewed from the front, must pass through each of the daisy-chained signals.

  • Page 24: Figure 2-2. Backplane Jumpers Required For Epc-9 Subsystem

    Module Figure 2-2. Backplane Jumpers Required for EPC-9 Subsystem. The figure above shows the jumpers required for a five-slot EPC-9 subsystem, consisting of a two-slot EPC-9, an EXP-MC module carrier for two additional EXM modules, and an EXP-MX storage module.
  • Page 25 EPC-9 Hardware Reference Once you have determined where the jumpers need to be, you must determine how to add jumpers to your particular backplane. Different backplane manufacturers handle this in different ways; some provide stake pins or wirewrap pins on the rear of the backplane while others provide pins on the front of the backplane.
  • Page 26 Configuration and Installation J1 Connectors IACK Figure 2-4. VMEbus Jumpers on Front Stake Pins. Consult your VMEbus chassis reference manual or contact the chassis manufacturer if you are unsure where to jumper your particular system. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 27: Epc-9 Insertion

    EPC-9 Hardware Reference EPC-9 Insertion The EPC-9 must be installed onto a subplane that fits between the EPC-9 and the VMEbus backplane. Subplanes are discussed in more detail in Appendix D - Subplanes. The subplane is installed first, connecting to the backplane. After installing the subplane, the EPC-9 processor module can be inserted into the VMEbus chassis.

  • Page 28: Connecting Peripherals To The Epc-9

    SCSI Termination When you configure SCSI peripherals to work with the EPC-9, you need to consider the placement of the EPC-9 in the SCSI chain. The EPC-9 is must be the last device in the SCSI chain, and thus is terminated.
  • Page 29 EPC-9 Hardware Reference Notes 2-10 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 30: Chapter 3 - Bios Configuration

    Configuration Introduction The EPC-9 uses the Phoenix NuBIOS to configure and select various system options. This section details the various menus and sub-menus that are used to configure the system. This section is written as though you are setting up each field in sequence and for the first time.

  • Page 31: Figure 3-1. Bios Setup Menu Map

    EPC-9 Hardware Reference Figure 3-1. BIOS Setup Menu Map. NOTE: The prompt to press the F2 key to enter the BIOS setup can be suppressed in the BIOS setup. See the Keyboard Features Sub-Menu for details. However, you can still press the F2 key to enter the BIOS setup, even if the prompt is suppressed.

  • Page 32: Main Bios Setup Menu

    BIOS Configuration Main BIOS Setup Menu The Main Setup Menu is shown below, in Figure 3-2: PhoenixBIOS Setup - Copyright 1985-96 Phoenix Technologies Ltd. Main Advanced Power Exit Item Specific Help System Time: [16:17:18] System Date: [03/01/96] <Tab>, <Shift-Tab>, or Diskette A: [Not Installed] <Enter>...

  • Page 33: Ide Adapter Sub-Menus

    The term “ Memory Shadow” refers to the technique of copying information from an extension ROM into DRAM and accessing it in this alternate memory location. The EPC-9 restricts what memory is available for shadowing because of the special requirements for SCSI and the Universe™ PCI/VME bridge. See Memory Shadow Sub-Menu for more information.
  • Page 34 BIOS Configuration System Memory This field is not editable and displays the amount of conventional memory (below 1MB). No user interaction is required. Extended Memory This field is not editable and displays the amount of extended memory (above 1MB). No user interaction is required. Artisan Technology Group - Quality Instrumentation ...

  • Page 35: Figure 3-3. Ide Adapter Sub-Menu

    There are a total of four IDE adapter sub-menus for the primary and secondary hard disk controllers, each having a master and slave drive menu. The EPC-9 uses an internal (primary) hard disk that is controlled by the settings for IDE Adapter 0 Master.
  • Page 36 POST. Note that there are some restrictions when setting up devices on the EPC-9. If you plan to boot from a non-IDE device, such as a SCSI hard disk, set the C: drive type as "None"...
  • Page 37 EPC-9 Hardware Reference used. Note that autotyping may change this value if the hard disk reports that it supports LBA. The default is “Disabled ”. 32-bit I/O This option allows the System BIOS to access the hard disk controller with 32-bit I/O accesses, increasing system performance.

  • Page 38: Figure 3-4. Memory Cache Sub-Menu

    BIOS Configuration Memory Cache Sub-Menu The options in this screen allow controlling the cacheability of certain memory regions and also the settings of the Level 2 (L2) cache. The Memory Cache Sub-Menu is shown below. PhoenixBIOS Setup - Copyright 1985-96 Phoenix Technologies Ltd. Memory Cache Item Specific Help Internal Cache:...

  • Page 39: Memory Shadow Sub-Menu

    EPC-9 Hardware Reference Cache Video BIOS Area This option enables or disables caching of the VGA BIOS area in the 0C0000h through 0C7FFFh region. The default is “Enabled ”. Cache Memory Regions These options enable or disable caching of the associated memory regions. When BIOS extensions are present in these regions, enabling caching for that region increases performance.
  • Page 40 BIOS Configuration region is shadowed that does not contain a BIOS extension. Note that each shadow region in the setup menu is 16KB in size. Multiple shadow regions may have to be enabled if the BIOS extension to be shadowed is larger than 16KB. System Shadow This option is not editable since the System BIOS is always shadowed.

  • Page 41: Boot Options Sub-Menu

    EPC-9 Hardware Reference Boot Options Sub-Menu Use the Boot Options Sub-Menu to change the boot sequence options. Select the Boot Options Sub-Menu by clicking on the Boot Sequence item in the Main Bios Setup screen. The Boot Options Sub-Menu appears: PhoenixBIOS Setup - Copyright 1985-96 Phoenix Technologies Ltd.
  • Page 42 BIOS Configuration 1. A: then C: Used to boot from the floppy drive, or if no floppy disk is present in the A: drive, boot from the C: drive. 2. C: then A: Used to boot from the C: drive, or if none is present, boot from the A: drive.

  • Page 43: Keyboard Features Sub-Menu

    EPC-9 Hardware Reference Keyboard Features Sub-Menu The Keyboard Features Sub-Menu allows you to enable or disable various keyboard features. To access the keyboard Features menu, select Numlock in the Main Bios Setup screen. PhoenixBIOS Setup - Copyright 1985-96 Phoenix Technologies Ltd.
  • Page 44 BIOS Configuration Keyboard auto-repeat rate: Use this option to set the auto-repeat rate if you hold a key down on the keyboard. The rate can be set to one of: “ 2/sec” , “ 6/sec” , “ 10/sec” , “ 13.3/sec” , “ 18.5/sec” , “21.8/sec ”, 26.7/sec ”, and “30/sec ”.

  • Page 45: Advanced Menu

    EPC-9 Hardware Reference Advanced Menu This menu controls advanced setup features, such as memory use, those items contained in integrated chipset architectures, plug-and-play capability, watchdog timer effects, large disk access modes, and user BIOS extension addresses. You access this menu by selecting Advanced from the Main BIOS Setup menu.
  • Page 46 BIOS Configuration Plug & Play OS If enabled, this option informs the System BIOS that the operating system that is booted supports Plug and Play. This has the effect of forcing the Plug and Play portion of the System BIOS to only configure motherboard devices and those peripherals that are necessary for booting (display, hard disk, etc.), the rest being left to the operating system to configure.

  • Page 47: Figure 3-9. Integrated Peripherals Sub-Menu

    EPC-9 Hardware Reference Destination Address: This option selects the target address of the BIOS extension which can range from D0000h through DFFFFh in 8KB increments. The default is “D0000h ”. BIOS Extension Size: This option selects the number of bytes to copy from the FBD into shadow memory.
  • Page 48 BIOS Configuration COM B This option is used to configure the serial port labeled on the front panel as “ COM B” . The selectable I/O base addresses and IRQs are: “ Disabled” , “ 3F8h, IRQ4” , “ 2F8h, IRQ3” , “ 3E8h, IRQ4” , “ 2E8h, IRQ3” , and “ Auto” . “ Auto” causes the System BIOS to choose a base address and IRQ setting that avoids conflicting with the other ports.

  • Page 49: Figure 3-10. Advanced Chipset Sub-Menu

    EPC-9 Hardware Reference Onboard SCSI Controller Use this option to enable or disable the onboard PCIbus SCSI controller. This option must be set to “ Disabled” if a PMC or EXMbus SCSI controller is installed in the system that conflicts with the resources used by the onboard controller. The default is “Enabled ”.
  • Page 50 “ ISA bus” to allow an ISAbus peripheral to use this interrupt line. Systems using a PS/2 mouse must have this option set to “ PS/2 Mouse” for the mouse to operate correctly. Since the EPC-9 has a PS/2 mouse connector, the default is “PS/2 Mouse ”.

  • Page 51: Power Management Menu

    EPC-9 Hardware Reference Power Management Menu Use the options in this menu to control the power management facilities. Only about one-half of the Power Management Menu Screen entries are visible at any one time, however, for completeness, all of the Power Management Menu entries are listed below.
  • Page 52 BIOS Configuration Power Savings This option enables and selects the kind of power management, or it disables power management. The options are: “ Disabled” , “ Customize” , “ Maximum” , “Medium ”, and “Minimum ”. The default is “Disabled ”. Standby Timeout This option enables and sets the inactivity duration required to elapse before the system is placed into Standby Mode, or it disables the Standby Timeout.
  • Page 53 EPC-9 Hardware Reference Standby Timer Reset Events Use these options to enable or disable resetting the Standby Timer, based on activity from the specified device. Keyboard Use this option to enable or disable Standby Timer reset, based on keyboard activity. The default is “Enabled ”.
  • Page 54 BIOS Configuration IRQ5 Use this option to enable or disable the Standby Break Event for IRQ5. The options are: “Disabled ” and “Auto ”. The default is “Disabled ”. IRQ6 Use this option to enable or disable the Standby Break Event for IRQ6. The options are: “Disabled ”...
  • Page 55 EPC-9 Hardware Reference IRQ13 Use this option to enable or disable the Standby Break Event for IRQ13. The options are: “Disabled ” and “Auto ”. Th e default is “Disabled ”. IRQ14 Use this option to enable or disable the Standby Break Event for IRQ14. The options are: “Disabled ”...

  • Page 56: Exm Menu

    Use the options in this menu to select and configure the available EXM slots. Since the EPC-9 uses modified EXM backplanes, the first 2 slots are physically covered by the PMC module(s). Therefore, EXM slots 0 and 1 will not be configurable in Setup and only slots 2 through 5 are available.

  • Page 57: Figure 3-13. Slot Numbering

    The proper value of this option for a slot with no EXM card installed is not defined. The value typically used is 00h, the default value. NOTE: Since the EPC-9 uses existing EXM backplanes, the first 2 slots will be covered by the PMC card(s). To compensate for this, EXM slot 0 and slot 1 are non-editable.
  • Page 58 Universe chip. Use DMA channels 1, 3, 6, and 7. Do not select I/O addresses that conflict with those in the EPC-9. A com- plete list appears in Appendix A. For instance, I/O addresses in the 300- 33F range can be used.

  • Page 59: Vme Menu

    This option is used to select among the four (0 through 3) VMEbus priority levels used when the EPC-9 requests the bus for a VME access. Priority level 0 is the lowest priority while priority level 3 is the highest priority. The default is priority level “0 ”.
  • Page 60 The default is “ROR (VME) ”. Unique Logical Address This option is used to select the ULA for the EPC-9. This logical address is used to uniquely identify and access the EPC-9 in a VXI system. The default is ULA “0 ”.

  • Page 61: Exit Menu

    EPC-9 Hardware Reference Exit Menu The options in this menu allow saving settings and exiting, or abandoning changes and exiting to the system, or controlling the backup and restoration of CMOS RAM to the FBD. PhoenixBIOS Setup - Copyright 1985-96 Phoenix Technologies Ltd.
  • Page 62 If you select this option by mistake, reset the EPC-9 to regain control. The system automatically begins searching for the update program that should be on the floppy disk inserted in drive A.
  • Page 63 EPC-9 Hardware Reference Notes 3-34 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 64: Chapter 4 - Theory Of Operation

    The EPC-9 is a PCI/ISA/VME bus-compatible computer with standard PC peripherals, and PCI, VME, and EXM bus interfaces. Physically, the EPC-9 occupies 2 VME slots. A 6U-sized I/O board serves as a motherboard for a processor daughterboard containing the Pentium CPU, system memory, cache memory, a cache and memory controller, a PCI/ISA/IDE bridge chip, a Flash Boot Device, a real-time clock, and a keyboard and mouse controller.

  • Page 65: Epc-9 Organization

    EPC-9 Organization Block Diagram The block diagram in Figure 4-1 shows the division and interconnection of EPC-9 functions. These are described below. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 66: Figure 4-1. Epc-9 Block Diagram

    Theory of Operation Figure 4-1. EPC-9 Block Diagram. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 67: Processor Module Daughterboard

    EPC-9 Hardware Reference Processor Module Daughterboard An Intel Pentium processor (with integral FPU) runs at 100, 133, 166, or 200 MHz. The processor, the TXC system controller, and the L2 cache all operate on a 66MHz local bus. The PCIbus runs at half the local bus speed (33MHz) and the ISA bus runs at one quarter the PCI bus speed (8.25 MHz).
  • Page 68 The area between 0 and 1 MB is largely defined by the IBM PC/AT architecture. The area between 1 MB and 256 MB depends on how much DRAM is installed in the EPC-9. The area above 256 MB, provides direct mapping to the VMEbus with a variety of address modifiers and byte orderings.
  • Page 69 The boot block is NEVER reprogrammed by the user, even when the main and parameter blocks are reprogrammed. The capability to program the boot block is provided to facilitate changes by RadiSys manufacturing. A “ forced recovery” jumper is provided that is connected to the P1-3 input of the 82C4PE keyboard controller.
  • Page 70 The Intel 82C42PE mouse/keyboard controller can interface to most standard PC mice and keyboards with PS/2-style connectors. The keyboard controller uses interrupt IRQ1 and the mouse uses IRQ12. An adapter cable is shipped with the EPC-9 to allow standard PC/AT keyboards with larger 5-pin connectors to plug into PS/2 connectors.

  • Page 71: Figure 4-2. Flash Boot Device Memory

    EPC-9 Hardware Reference Physical Address Device Offset FFFFFFFFh Boot Block 7FFFFh 16 KB FFFFC000h BIOS Recovery Code 7C000h Parameter Block 2 7BFFFh 8 KB FFFFA000h System BIOS 7A000h Parameter Block 1 79FFFh 8 KB FFFF8000h System BIOS 78000h Main Block 4...

  • Page 72: I/O Motherboard

    I/O Motherboard Ethernet Controller The EPC-9 implements 10/100BaseT Ethernet communications by using the DEC 21143 10BASE-T and 100BASE-TX Ethernet Controller coupled to a QSI 6611 Physical Interface (PHY) chip. The 21143 chip interfaces to the 32-bit PCI bus and the...

  • Page 73: Figure 4-3. Replacing The Lithium Cmos Battery

    +5V power supply voltage can supply power and neither power source affects the other. The 3.0V lithium battery supplied with the EPC-9 is a Ray-O-Vac BR2335 “ coin cell” or equivalent. It is mounted at the rear of the Main I/O Board, beneath the EPC- 9 Carrier Board.
  • Page 74 Theory of Operation (2) RS-232 Serial Ports, a bidirectional parallel port, and (2) Universal Serial Bus (USB) ports. The RS-232 ports and the parallel ports, along with the floppy disk controller, are implemented by the SMC FDC37C665IR Super I/O Chip. RS-232 Ports The RS-232 ports are standard PC COM serial ports based on the 16550 architecture.
  • Page 75 PCI/VME Bridge The VMEbus interface on the EPC-9 is controlled by a single chip: the Tundra Semiconductor, Universe PCI/VME bridge. The Universe controls a layer of buffers between it and the VMEbus, and has a glueless interface to the PCIbus.

  • Page 76: Pmc-1 Video Module

    Chapter 5 - Programming the VMEbus Interface. PMC-1 Video Module The EPC-9 uses the PMC-1 Video Module for SVGA support. The PMC-1 uses a Cirrus Logic CL-GD5446. The video module connects to the PCIbus and has 2MB of VGA memory, and resolutions from 640 x 480 (256 colors) to 1280 x 1024 (256 colors).

  • Page 77: Front Panel Leds

    EPC-9 Hardware Reference Front Panel LEDs The EPC-9 has eight LEDs in the top left corner of the front panel. These LEDs are described below: TEST(yellow) This LED is lit whenever the system is running its power-on self-test, as reflected in the PASS bit in the VXI registers.

  • Page 78: Resetting The Epc-9

    When power is less than ~3.0V, the system performs a cold hardware reset. Front panel Reset button “ Warm” hardware reset. The Reset button causes the EPC-9 to perform a hardware reset. The system runs the power-on self-tests and reboots the operating system.

  • Page 79: Exm Expansion Interface

    This ID byte is the same identification byte discussed earlier in Chapter 3 - BIOS Configuration in the section on the EXM Menu. The EXM expansion interface is provided on rows A, C, and D of the EPC-9’s 4-row DIN P2 connector. The subplane carries the EXM interface to other modules, such as to EXM modules and the EXP-MX Mass Storage module.
  • Page 80 Theory of Operation The EPC-9 contains programmable byte-swapping hardware to allow programs to read or write VMEbus memory in either byte order. The EPC-9 uses the Tundra Universe supervisor address modifier bit, AM bit 2, to control byte-swapping. This bit is emitted by the Universe chip and intercepted by the EPC-9 byte-swap control hardware which uses it to control whether or not byte-swapping occurs.
  • Page 81 EPC-9 Hardware Reference 6qq…ÃÃ" 6qq…ÃÃ! 6qq…ÃÃ 6qq… 3HQWLXP K $GGUHVV 0RWRUROD K $GGUHVV 6qq…ÃÃ" 6qq…ÃÃ! 6qq…ÃÃ 6qq… Since the Pentium processor uses Addr as the least-significant byte and the Motorola processor uses Addr as the most-significant byte, the processor receiving the data gets a "scrambled"...

  • Page 82: Chapter 5 - Programming The Vmebus Interface

    Universe chip is programmed. Programming the Universe The Universe chip can become system controller if the EPC-9 is in slot 1. It does this by sampling the VME signal BG3IN*. If BG[3:0] is low after reset, which it is, due to the Universe’s internal pull-down, then the EPC-9 is in slot 1 and the Universe...

  • Page 83: Vmebus Arbitration

    EPC-9 Hardware Reference VMEbus Arbitration The bus arbiter supports the following arbitration modes: • Fixed Priority Arbitration (PRI) • Single Level arbitration (SGL), which is a subset of PRI • and Round Robin arbitration (RRS), which is the default setting.

  • Page 84: Vmebus Master Accesses

    VMEbus block transfers are supported by the Universe using its on-chip DMA controller. The EPC-9 can respond as a VMEbus Slave in either A24 or A32 address spaces. It responds to either D08, D16 or D32 accesses. Read accesses from the VMEbus to onboard memory may be either coupled or prefetched (for block transfers), while write accesses may either be posted or coupled.

  • Page 85: Vmebus Locked Accesses (Rmw)

    When an IACK cycle on the VMEbus is detected that matches an interrupt level that the EPC-9 is asserting (and the IACKIN daisy chain is asserted into the EPC-9), the Universe responds by supplying an 8-bit STATUS/ID vector.

  • Page 86: Vmebus Access To Universe Registers

    Programming the VMEbus Interface VMEbus Access to Universe Registers As mentioned earlier, the Universe can be programmed to make its registers accessible from the VMEbus. The Universe will power-up with VMEbus access to its registers disabled, and it can be later programmed by application software to enable them for VMEbus access.
  • Page 87 EPC-9 Hardware Reference Notes Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 88: Chapter 6 - Support And Service

    World Wide Web RadiSys maintains an active site on the world wide web. The home-page URL is http://www.radisys.com. The site contains current information about the company and locations of sales offices, new and existing products, contacts for sales, service, and technical support information.

  • Page 89: Repair Services

    RadiSys analyzes the product after it is received. When instructed to do so, RadiSys informs the customer of repair costs for authorization.

  • Page 90: Arranging Service

    A technical support representative will issue a Returned Materials Authorization (RMA) number, a code number by which RadiSys tracks the product while it is being processed. Once you receive the RMA number, follow the instructions of the technical support representative and return the product to RadiSys, freight prepaid.

  • Page 91: Other Countries

    EPC-9 Hardware Reference Other Countries Use the RadiSys world wide web site to contact us, or contact the sales organization from which you purchased your RadiSys product for service and support. The RadiSys world wide web URL is http://www.radisys.com. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 92: Appendix A - Chipset And I/O Map

    Appendix A - Chipset & I/O Map The following defines the I/O addresses decoded by the EPC-9. Only the A9-A0 bits are decoded for the registers between 200h and 3FFh. For the I/O addresses above 8000h, A15 and A9-A0 are decoded.

  • Page 93: Keyboard Port

    EPC-9 Hardware Reference Keyboard Port I/O Addr Functional group Usage Keyboard controller Data I/O register NMI status NMI status Keyboard controller Command/status register Time-of-Day Clock I/O Addr Functional group Usage Real-time clock RTC index reg / NMI enable RTC data register (64 bits)

  • Page 94: Second Interrupt Controller

    Appendix A: Chip Set & I/O Map EXM Configuration I/O Addr Functional group Usage EXM Config EXM slot register (part of the subplane) EXM IDs (on each EXM module) EXM option byte 1 (slot specific) EXM option byte 2 (slot specific) Second Interrupt Controller I/O Addr Functional group...

  • Page 95: Ide Control

    EPC-9 Hardware Reference IDE Control I/O Addr Functional group Usage IDE Control Data Register Sector Count Sector Number Cylinder LSB Cylinder MSB Drive/ Head Status/ Command ISA Plug and Play I/O Addr Functional group Usage Plug and Play Data Register...

  • Page 96: Vga

    Appendix A: Chip Set & I/O Map I/O Addr Functional group Usage CRT Controller index CRT Controller data Feature control output, Input status Attribute controller Index/Data Attribute controller Index/Data Miscellaneous output, Input status Sleep Sequencer Index Sequencer Data Video DAC pixel mask, Hidden DAC register Pixel address read mode, DAC state...

  • Page 97: Ecp Registers

    EPC-9 Hardware Reference ECP Registers I/O Addr Functional group Usage Data FIFO/ Config Register A Data FIFO/ Config Register B Extended Control Register VME and Misc I/O Addr Functional group Usage 814C VME and Misc Message High register 814D Message High register...

  • Page 98: Appendix B Interrupts And Dma Channels

    Appendix B - Interrupts and DMA Channels Interrupts The assignment of interrupts for the EPC-9 is shown in the following table: DRAM parity error, EXM expansion interface I/O channel check asserted IRQ0 timer IRQ1 keyboard controller IRQ2 IRQ8 - IRQ15 cascade through IRQ2...

  • Page 99: Dma Channels

    PMC-1 card needs DMA, or the use of INTB, then the on-board Ethernet must be disabled. DMA Channels The assignment of DMA channels for the EPC-9 is shown in the following table. Channel Assignment Available on EXM unassigned (8-bit)

  • Page 100: Appendix C - Connectors And Jumpers

    This Appendix specifies the details of the connectors and jumpers used on the EPC-9. The locations of the connectors on the EPC-9 I/O board are shown in Figure C-1. The location of connectors on the front panel are shown in Figure C-2. The optional PMC- 1 Video Module is shown.

  • Page 101: Figure C-2. Epc-9 Front Panel

    EPC-9 Hardware Reference Figure C-2. EPC-9 Front Panel. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 102: Keyboard Connector

    Connectors Keyboard Connector The PS/2 keyboard connector is a 6-pin mini-DIN connector defined as follows: Pin Signal Pin Signal 1 Data 2 not used Clock 3 Ground not used Table C-1. Keyboard Pin-Out. Mouse Connector The PS/2 mouse connector is a 6-pin mini-DIN connector defined as follows: Pin Signal Pin Signal...

  • Page 103: Ports (Com A, Com B

    EPC-9 Hardware Reference RS-232 Ports (COM A, COM B) The RS-232 serial port male DB-9 DTE connectors are defined as follows: Signal Signal Carrier detect Data set ready Receive data Request to send Transmit data Clear to send Data terminal ready...

  • Page 104: Svga Connector

    Connectors SVGA Connector (on the Front Panel of the optional PMC-1 Video Module) The SVGA monitor port is a DB-15 connector defined as follows: Signal Signal (key) Green Ground Blue (not used) (not used) (not used) Ground Horizontal sync Ground Vertical sync Ground programmable...

  • Page 105: Dual Usb Connector

    EPC-9 Hardware Reference Dual USB Connector The USB (Universal Serial Bus) connector is a dual, stacked 4-pin connector defined as follows: Description Mechanical Shield Ground Solder Lug VCC (1Amp Fused) DATA- DATA+ Signal Ground Mechanical Shield Ground Solder Lug Table C-7. Dual USB Connector...

  • Page 106: Scsi-2 Connector

    Connectors SCSI-2 Connector The SCSI-2 port is a female 50-conductor .050 center mini-D style connector defined in the following table. To disable the SCSI terminator, see SCSI Terminator Disable Jumper, later in this appendix. Signal Signal Signal GND Terminator Power ~DB0 Signal GND Signal GND...

  • Page 107: Eide (Primary) Connector

    EPC-9 Hardware Reference EIDE (Primary) Connector The Primary EIDE Connector is a male 44-pin right-angle header designated JP1, located on the Main I/O board, under the optional PMC-1 SVGA Board. The pins and signals are defined in the following table:...

  • Page 108: Eide (Secondary) Connector

    Connectors EIDE (Secondary) Connector JP3 The Secondary EIDE Connector is a male 40-pin header designated JP3, located at the front of the bottom edge of the Main I/O board. The pins and signals are defined in the following table: Signal Signal ~RST N.C.

  • Page 109: Floppy Disk Drive Connector

    WRPRT RDATA HDSEL DSKCHG * - Vcc if jumper JP2 is installed (RadiSys floppy drive) N.C. if jumper JP2 is not installed. Table C-11. Floppy Disk Drive Connector. C-10 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 110 The Fan Failure Detect Enable Jumper (J10) is located at the front of the top of the Main I/O board, behind the front panel LEDs as shown in Figure C-1. The jumper is installed for the EPC-9, but is removed when the EPC-9 is upgraded to an EPC-10, which uses the Pentium Pro Processor Module.
  • Page 111 EPC-9 Hardware Reference Notes C-12 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 112: Appendix D - Subplanes

    Subplane Installation A subplane is a printed-circuit board with connectors on both sides. Subplanes extend the PC/AT bus and provide power from the VMEbus backplane to the EPC-9, any EXM expansion modules, and an optional EXP-MX Mass Storage Module. Depending on the particular EPC-9 subsystem configuration, a specific subplane will need to be installed.

  • Page 113: Bp9E0 Subplane

    EPC-9 Hardware Reference D†‡hyyÃWH@iˆ† wˆ€ƒr…†ÃvÃ‡uv† BP9E0 Subplane †y‚‡ This subplane is used in the smallest configuration, where EPC-9 processor is used by itself, occupying two VME slots. Note that no EXM modules or EXP-MX Mass Storage Modules used with this configuration.

  • Page 114: Bp9E0M Subplane

    P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-9 subsystem will occupy. The EXM slot numbers are shown in the drawing. D†‡hyyÇurÃ@Q8( vÃ‡ur†rǐ‚Æy‚‡†...

  • Page 115: Bp9E2 Subplane

    VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-9 subsystem will occupy. The EXM slot numbers are shown in the drawing. D†‡hyyÇurÃ@Q8( vÃ‡ur†rǐ‚Æy‚‡†...

  • Page 116: Bp9E2M Subplane

    VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-9 subsystem will occupy. The EXM slot numbers are shown in the drawing.

  • Page 117: Bp9E4 Subplane

    P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-9 subsystem will occupy. The EXM slot numbers are shown in the drawing. D † ‡h yyÇu r Ã@ Q 8  ( v...

  • Page 118: Bp9E4M Subplane

    VMEbus backplane such that the P2 connector on the back of the 4-row DIN is pressed into the J2 connector of the left-most VMEbus slot that the EPC-9 subsystem will occupy. The EXM slot numbers are shown in the drawing.
  • Page 119 EPC-9 Hardware Reference Notes Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 120: Appendix E - Registers

    Registers Registers Specific to the EPC-9 Registers in the I/O space that are specific to the EPC-9 are defined below. Only registers 814Ch-814Fh are "dual-ported" to both the PC and VMEbus. The addresses shown below are used by the PC port. The VME addresses for the registers 814Ch- 814Fh are described later.
  • Page 121 EPC-9 Hardware Reference IACK Latch 1 Low IACK1[7..0] 8162h IACK Latch 1 High IACK1[15..8] 8163h IACK Latch 2 Low IACK2[7..0] 8164h IACK Latch 2 High IACK2[15..8] 8165h IACK Latch 3 Low IACK3[7..0] 8166h IACK Latch 3 High IACK3[15..8] 8167h IACK Latch 4 Low IACK4[7..0]...

  • Page 122: Register Details

    Registers Register Details Message Registers (814Ch) Message High Register MH[7..0] 814Ch Message High Register MH[15..8] 814Dh Message Low Register ML[7..0] 814Eh Message Low Register ML[15..8] 814Fh This is the PC-port side of the VXI message registers. Each of the 16-bit Message registers is actually two registers, an inbound register and an outbound register.
  • Page 123 EPC-9 Hardware Reference WDTR Watchdog timer reset enable. If 1, expiration of the watchdog timer causes a reset. If 0, only the WDT event is signaled. A read of the this register should be performed before enabling the watchdog timer reset.
  • Page 124 SYSR 8155h These registers adhere to the VXIbus specification and also contains EPC-9 specific bits. Bits RSTP and NOSF are writeable only from the VME port. Bits SRIE, RDY, PASS, SYSR are writeable only from the PC Port. All bits are readable from both ports.
  • Page 125 EPC-9 Hardware Reference Model Register (8156h) MODEL 8156h This register is a write once register after reset. The intent is for the BIOS to load this with the model number based on the EPC model. Once written, it is read only as the low 8 bits of the device type register in the VXI register space.

  • Page 126: Vxi Register Details

    Registers Response Register (815Ah) 815Ah LOCK RRIE ABMH FSIG LSIG Response Register (815Bh) 815Bh The Response Register is described below, in the Response Register description in VXI Register Details. IRQ Register (8161h) 8161h This register specifies which VME interrupt is to be asserted. 000 indicates none. 001 means assert IRQ1, 010 means assert IRQ2, …...
  • Page 127 ID/ULA Register (offset 0h) ID/ULA Register (offset 1h) This register adheres to the VXIbus specification. It defines EPC-9 as a message- based device and the manufacturer as RadiSys. When read, the ID is returned. When written, the lower 8 bits define the unique logical address (ULA). The upper 8 bits are ignored.
  • Page 128 SRIE SYSRESET input enable. If set, assertion of VME SYSRESET generates a reset of the EPC-9. One use of this bit is having EPC-9 software reset other VME devices (via bit SYSR) without resetting EPC-9. SYSC SYSCLK status bit. All writes to this register have the effect of clearing this bit.
  • Page 129 A read of these registers reads the ROM constants stored in the protocol register. A write to this register location writes the signal register. The protocol register (the read value) defines EPC-9 as being a servant and commander, having a signal register, being a bus master and an interrupter, not providing the shared-memory protocol, and not providing fast handshake mode.
  • Page 130 Registers This bit is used for synchronization of messages from multiple senders, something not provided for in the VXI specification. If 1, the message register can be locked for the sending of a message. If 0, the message register has been locked. See the discussion of message sending protocol, below.
  • Page 131 EPC-9 Hardware Reference For 32-bit messages, write first into Message High register and then into the Message Low register. The bits RRY, WRY, ABMH, and MLK in the Response register are altered by hardware-detected conditions. A read from the Message Low clears RRY. A write into all or the lower 8 bits of the Message Low register clears WRY.

  • Page 132: Vxi Register Base Address Decoding

    Registers Message High Register (offset Ch) MH[7..0] Message High Register (offset Dh) MH[15..8] Message Low Register (offset Eh ML[7..0] Message Low Register (offset Fh) ML[15..8] See the description above for the operation of these registers. VXI Register Base Address Decoding To determine the VXI Register Base Address: 1.
  • Page 133 EPC-9 Hardware Reference Notes E-14 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 134: Appendix F - Glossary

    Appendix F - Glossary  A  Access Time: A factor in measurement of a memory storage device’s operating speed. It is the amount of time required to perform a read operation. More specifically, it is the period of time between which the memory receives a read command signal and the time when the requested data becomes available to the system data bus.
  • Page 135 EPC-9 Hardware Reference hardware, allows the user to configure the hardware, boots the operating system, and provides standard mechanisms that the operating system can use to access the PC’s peripheral devices. BIOS Data Area (BDA): BIOS Data Area. A 256 byte block of DRAM starting at address 400H that contains data initialized and used by the System BIOS detailing the system configuration and errors encountered during POST.
  • Page 136 Glossary  C  Central Processing Unit (CPU): A semiconductor device which performs the processing of data in a computer. The CPU, also referred to as the microprocessor, consists of an arithmetic/logic unit to perform the data processing, and a control unit which provides timing and control signals necessary to execute instructions in a program.
  • Page 137 EPC-9 Hardware Reference  D  Default: The state of all user-changeable hardware and software settings as they are originally configured before any changes are made. Disk Operating System (DOS): One or more programs which allow a computer to use a disk drive as an external storage device. These programs manage storage and retrieval of data to and from the disk and interpret commands from the computer operator.
  • Page 138 Flash Boot Device (FBD): A flash memory device containing the computer’s BIOS. In the EPC-9, a 512 KB Intel 28F004BV-T semiconductor flash memory containing the system and video BIOS images, the BIOS initializing code and the recovery code which allows self hosted reflashing.
  • Page 139 EPC-9 Hardware Reference  H  Hang: A condition where the system microprocessor suspends processing operations due to an anomaly in the data or an illegal instruction. Header: A mechanical pin and sleeve style connector on a circuit board. The header may exist in either a male or female configuration.
  • Page 140 Glossary interrupt service routine is completed, the microprocessor resumes execution of the program it was working on before the interruption occurred. Interrupt Service Routine (ISR): A program executed by the microprocessor upon receipt of an interrupt request from an I/O device and containing instructions for servicing of the device.
  • Page 141 EPC-9 Hardware Reference  O  Offset: The difference in location of memory-mapped data between the physical address and the logical address. Operating System: See Disk Operating System.  P - Q  PCI Mezzanine Card (PMC): A new standard form factor for PCI add-in modules.
  • Page 142 Glossary Power On Self Test (POST): A diagnostic routine which a computer runs at power up. Along with other testing functions, this comprehensive test initializes the system chipset and hardware, resets registers and flags, performs ROM checksums, and checks disk drive devices and the keyboard interface. Program: A set of instructions a computer follows to perform specific functions relative to user need or system requirements.
  • Page 143 EPC-9 Hardware Reference Reflashing: The process of replacing a BIOS image, in binary format, in the flash boot device. Register: An area typically inside the microprocessor where data, addresses, instruction codes, and information on the status on various microprocessor operations are stored. Different types of registers store different types of information.
  • Page 144 Glossary when the system requires frequent BIOS calls. Typically, system and video BIOS extensions are shadowed in DRAM to increase system performance. Single In-Line Memory Module (SIMM): A small, rectangular circuit board on which is mounted semiconductor memory ICs. Small Outline Dual Inline Memory Module (SO DIMM): A new form factor for memory modules that is smaller and denser than SIMMs.
  • Page 145 USB ports, all with identical connectors but capable of much higher throughput, upwards of 12Mbs. User Editable Drive (UED): A feature of the EPC-9’s Phoenix NuBIOS. When a “User” type hard disk drive setting shows in the IDE Adapter Sub-Menu the BIOS queries the hard disk drive for the purpose of retrieving disk geometry.

  • Page 146: Appendix G - Svga And The Pmc-1 Video Module

    Appendix G - SVGA and the PMC-1 Video Module Video Controller Hardware The PMC-1 Video Module uses the Cirrus Logic SVGA GD5446 video graphics controller connected to the 33MHz PCI bus to give the best possible graphics performance. The PMC-1 conforms to the PC Mezzanine Card (IEEE-P1386) form factor.
  • Page 147 EPC-9 Hardware Reference Resolution No. of Colors Bits per Memory Required Pixel 640x480 512KB 640x480 15/8 640x480 640x480 640x480 800x600 512KB 800x600 512KB 800x600 15/8 800x600 800x600 800x600 1024x768 512KB 1024x768 1024x768 15/8 1024x768 1024x768 1280x1024 1280x1024 Table G-1. Video Resolutions Available.

  • Page 148: Installing The Pmc-1 Svga Video Module

    Locate the package containing 4 small screws and an O-ring. It came with the PMC-1. The screws will be used to mount the PMC-1 to the EPC-9 Carrier Board. The O-ring will be used to seal the PMC-1 Front Panel into the PMC0 opening in the EPC-9 Front Panel.

  • Page 149: Figure G-1. Svga Module Installation Steps 3 And 4

    Figure G-1. SVGA Module Installation Steps 3 and 4 Remove the front panel of the EPC-9 by removing the 6 jack screws - 2 each at the COM A, COM B, and LPT1 connectors. Then remove the (2) long screws, nuts, and sleeves that attach the VME ejector handles.

  • Page 150: Figure G-2. Svga Module Installation Steps 5 And 6

    Use two of the screws mentioned in step 2 to secure the PMC-1 Front Panel to the Carrier Board. Be sure to mount the Front Panel so that the opening for the VGA connector is located at the lower side of the EPC-9 Front Panel opening labeled PMC0.

  • Page 151: Display Drivers And Utilities Software

    12. Install the O-ring in the groove in the PMC-1 Front Panel. 13. Re-install the EPC-9 Front Panel by sliding it carefully over the PMC-1 Front Panel O-ring and the O-ring in the blank panel.

  • Page 152: Cirrus Logic Support

    SVGA Cirrus Logic Support If there are any newer versions of the Cirrus driver software provided with your PMC-1, they will be available from Cirrus Logic support. They maintain a web page at http://www.cirrus.com/support/. Also, if you need answers to questions about the Cirrus chip, you can contact them at e-mail: ui-support@corp.cirrus.com, phone: 510- 623-8300, or FAX: 510-252-6020.
  • Page 153 EPC-9 Hardware Reference Notes Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 154: Appendix H - Error Messages & Diagnosis

    Appendix H - Error Messages & Diagnosis Boot Failures The System BIOS halts and attempts to display an error message on the VGA monitor when it encounters the following error conditions: Fixed disk error • No drive connected • Configured for 0 cylinders •...
  • Page 155 EPC-9 Hardware Reference Video error • Color/Mono switch not set correctly Timer error • System timer (0) failed Diskette error • Floppy type does not match setup I/O chip error • I/O conflicts exist for serial and parallel ports, floppy, hard disk...

  • Page 156: Troubleshooting

    Call RadiSys Technical Support. hardware failure (with or without onboard video). Call RadiSys Technical Support. If EXM-based video is used, the EPC-9 cannot talk to EXM expansion interface. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 157 VME backplane and the combinations of beep EPC-9 is fully seated in the tones from the speaker. subplane. BIOS detects a failure Note BIOS Beep Code. Refer to BIOS Beep Codes, below.
  • Page 158 Slot-1 controller jumper is set. EPC-9 or subplane may Remove the EPC-9 and the have bent pins. subplane and verify that no pins are bent. Then reinsert the subplane and the EPC-9.

  • Page 159: Bios Beep Codes

    EPC-9 Hardware Reference BIOS Beep Codes If the BIOS detects a critical error condition while running the Power On Self Test (POST) code, it may halt after issuing a beep code and attempting to display the error code in the upper left corner of the screen. The audible codes consist of patterns of beeps and pauses.
  • Page 160 Index Battery, 4-9, 4-10 replacing, 4-10 BG0 - BG3, 2-3, 5-6 100Base-TX, C-5 BG0In - BG3In, 2-4, 5-6 10Base-T, C-5 BG0Out - BG3Out, 2-4, 5-6 16-bit I/O Recovery, 3-21 big-endian, 4-16, 4-18 BIOS, F-1 setup, 3-1–3-34 32-bit I/O, 3-8 update, 3-33 BIOS Data Area, F-2 BIOS extension term defined, F-2...
  • Page 161 EPC-9 Hardware Reference byte order, 4-17 Current, 1-8 Cylinders/Heads/Sectors (CHS) byte ordering, 4-16 byte-swapping, 4-17 term defined, F-3 cache D08, 4-17 system BIOS, 3-9 D16, 4-17, 4-18 VGA BIOS, 3-10 D32, 4-17 Cache Memory, 4-4 daisy chain, 2-2, 5-6 Central Processing Unit (CPU)
  • Page 162 Index EPConnect, 4-18 floppy disk drive connector, C-10 EPP Registers floppy drive I/O Map, A-4 enable/disable search, 3-13 ESD, 2-1 front panel LEDs, 4-14 Ethernet Controller, 4-9 events wake-up, 3-26 Glossary of Terms, F-1 Exit Menu, 3-32 EXM, 2-3, 4-16, 5-6, D-5 EXM Configuration I/O Map, A-3 hard disk...
  • Page 163 EPC-9 Hardware Reference VGA, A-5 jumper, 2-3, 2-4, 5-6 VME and Misc, A-6 Fan Failure Detect Enable, C-11 I/O space map, A-1 SCSI Terminator Disable, C-11 IACK, 2-2, 2-3, 5-6 jumpers, 2-5, 2-6 IACK daisy chain, 2-2, 5-6 backplane, 2-4...
  • Page 164 Index Main BIOS Setup Screen, 3-3 P2, 4-16 Main System Memory, 4-4 Parallel I/O (LPT1) Port upgrading, 4-4 I/O Map, A-4 Mass Storage module, 2-3, 5-6, D-3, D-4, Parallel port, 3-29, 4-11, C-4 D-5, D-7 PC/AT bus, D-1 memory PCI/VME Bridge, 4-12 region, cacheing, 3-10 PCIbus shadow, 3-10...
  • Page 165 2-4, 5-6, F-11 dual-ported, E-1 Slot Numbering, 3-28 message, E-3 slot numbers, D-4 specific to EPC-9, E-1 Slot-1, H-4 Release on request, E-3 Slot-1 controller, 2-2, 2-3, 2-4, 5-6, H-4 repair service, 6-1 SRST bit, 4-6 reset, 4-6, 4-15, E-9...
  • Page 166 Index system control functions, 2-2, 5-6 Universe system controller, 2-2, 5-6 as system controller, 5-1 System Date, 3-3 programming, 5-1 system description, 4-1 USB, 4-11, C-6 System Memory, 3-5 User Editable Drive (UED) amount displayed, 3-5 term defined, F-12 term defined, F-11 System Time, 3-3 I/O Map, A-5 Technical Support...
  • Page 167 EPC-9 Hardware Reference warm reset, 4-6 device type, 1-8 warranty information, 6-2 manufacturer code, 1-8 watchdog timer model code, 1-8 halt on reset, 3-17 protocols, 1-8 watchdog timer, 4-5, E-4 VXI Register world wide web base address decoding, E-13 technical support, 6-1...
  • Page 168 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...

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