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Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...
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Flash Memory Addresses Re-Programming the Flash Chip Carrier Card Design EPC-6320/21 Test Board w w w. r a d i s y s . c o m 007-01490-0002 • April 2005 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Before you Begin ........................................Installing the EPC-6320/21 PMC on the Carrier Card............................. Using the 3-Pin Connector..................................Booting the EPC-6320/21 via MBA (Managed PC Boot Agent) ........................Maintaining and Upgrading the EPC-6320/21 ..............................Disconnecting the EPC-6320/21 PMC from the Carrier Card ......................
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Block Diagram ......................................... Description ..........................................CPU........................................... Tualatin 512K LP processor Speed and Voltages .......................... Clocking ........................................... The RadiSys 82600 ....................................... PCI Interrupts......................................Dual PCI bus architecture .................................. Local PCI Bus (Bus 0) ..................................PCI Ethernet controller ..................................Backplane PCI bus (Bus 1)................................
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Arbitration ........................................RTC Battery ........................................Mechanical and Thermal Design..................................Power consumption...................................... Airflow..........................................Maximum Ambient Temperature ................................Carrier Card Schematic Samples..................................Appendix H: EPC-6320/21 Test Board Features............................................. External Interfaces......................................Specifications ........................................... Block diagram .......................................... Physical Interfaces........................................Connectors and Jumpers..................................... Reset Switch ......................................
Preface This guide describes EPC-6320 and EPC-6321 (hereinafter referred to as the EPC-6320/21), PrPMCs (Processor PCI Mezzanine Cards) that use the RadiSys 82600 † integrated chipset to bring Intel Architecture processors into ultra-dense form factors. This guide is for hardware and software designers, engineers, and those with a electronics and/or programming knowledge who need to understand EPC-6320/21 operation.
Readme file: Lists features and issues that arose too late to include in other documentation. • World Wide Web: RadiSys maintains an active site on the World Wide Web. The site contains current information about the company and locations of sales offices, new and existing products, contacts for sales, service, and technical support information.
Preface H A R D W A R E R E F E R E N C E About Related EPC-6320/21 Components Processor PMC standard, VITA 32-2002, Draft 0.9. ANSI/VITA 32-2003 American National Standard for Processor PMC, Revision 1.0: .
133MHz PSB and 133MHz memory bus. For maximum flexibility, the EPC-6320/21 leverages the dual mode PCI-to-PCI bridge capability of the RadiSys 82600 to automatically configure the bridge, based on the strapping of the slot on the baseboard. This capability allows the EPC-6320/21 to become a Monarch PrPMC, and provide PCI bus enumeration and service interrupts on the PCI bus or a non-Monarch PrPMC and function as a PCI-based auxiliary processor.
® -6320/21 Introduction H A R D W A R E R E F E R E N C E The EPC-6320/21 can be ordered in these configurations: Figure 1-2. EPC-6320/21 Ordering Configurations Configuration Description Ethernet EPC-6320 EPC6320-933-512 512 MB SDRAM Dual Ethernet ports on the front panel.
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® -6320/21 Introduction H A R D W A R E R E F E R E N C E • Two 82C37 DMA controllers. • Real-Time Clock (RTC). • COM port support with 16550 compatible UART. • Integrated watchdog timer. •...
The EPC-6320/21 meets the following environmental specifications. CAUTION • Use the EPC-6320/21 only with compatible UL Listed computers that have installation instructions that details user installation of card cage accessories. • Ensure that the operating environment provides sufficient airflow (200 LFM) across the CPU board to keep it within its temperature specification.
PMC module. EPC-6320/21 complies with these size standards: • Tall PrPMC standards: EPC-6320/21 height falls between the limits of Standard (3.5 mm) and Tall (23.5 mm for side 2 components), as defined by Processor PMC standard, VITA 32-2002, Draft 0.9.
® -6320/21 Introduction H A R D W A R E R E F E R E N C E Power This table includes the power requirements for the 1GB memory SDRAM module. Table 1-3. Power Estimates Supply Max. power, Watts Typical power, Watts +3.3V Total power: 26...
The EPC-6320/21, like most other electronic devices, is susceptible to ESD damage. ESD damage is not always immediately obvious. It can cause a partial breakdown in semiconductor devices that might not result in immediate failure.
Before you begin, ensure that you have a null-modem cable that connects the 3-pin connector to your terminal. Note You must construct this cable; RadiSys does not supply a cable for the 3-pin connector. For pinout information, see 3-Pin COM Connector on page 63.
NFS server. Maintaining and Upgrading the EPC-6320/21 Occasionally you will want to perform maintenance or upgrades on the EPC-6320/21. When this occurs, you must remove the board from the carrier card, repair or install the Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
1. Remove the screws on the back of the carrier card. 2. Pull the boards apart while keeping them parallel. Continue applying force until the connectors completely disengage. After performing maintenance and/or upgrades, replace the EPC-6320/21 as described in Installing the EPC-6320/21 PMC on the Carrier Card on page 11.
Installing Red Hat 7.3 or Later over the Serial Port ..................15 Installing MontaVista Linux ............................. 17 Configure the Host to Boot EPC-6320/21 over the Network ..............17 Install MontaVista Linux to a Hard Drive ......................21 Installing VxWorks ..............................23 Requirements ...............................
A. Press F2 to enter the BIOS Setup program (see page 27). B. Make the CD-ROM the first device the EPC-6320/21 tries to boot from by moving the CD-ROM to the top of the list in the Boot Menu (see page 42).
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® -6320/21 Operating System Installation H A R D W A R E R E F E R E N C E C. Change the console and terminal baud rates to 9600. D. Save your changes and reboot. The system boots over the serial port at 9600 bps, then displays the boot: prompt. Enter this command: linux console=ttyS0,9600n8 The serial port displays kernel messages.
2. Install the tools according to the host tools instructions. When the installation prompts you to install an LSP, choose any LSP based on an Intel Pentium III processor. 3. Extract kernel source files from the RadiSys-supplied LSP archive to a work area. Configure DHCP CAUTION Ensure that the DHCP server is configured correctly.
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® -6320/21 Operating System Installation H A R D W A R E R E F E R E N C E default-lease-time 1209600; # two weeks max-lease-time 31557600; # one year group { next-server TFTPAddress option routers Gateway host Target hardware ethernet MACAddress...
® -6320/21 Operating System Installation H A R D W A R E R E F E R E N C E The DHCP daemon is required to service BOOTP requests when booting the target. To run the DHCP daemon (on the host) on every boot, enter this command: /sbin/chkconfig dhcpd on CAUTION Use caution when running this command on a corporate network.
3. Copy bzImage to /tftpboot. 4. Change the boot device: A. Attach: • An Ethernet cable to the EPC-6320/21 that allows access to your DHCP server. • A null modem cable from the EPC-6320/21 to a PC serial port. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
None Data bits: Stop bits: Flow control: None C. Power-on the EPC-6320/21. D. Enter the BIOS Setup program (see page 27) and set the first boot device as UNDI (on-board Ethernet). Save your changes and reboot. The kernel boots over the network and displays on the serial port.
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3. On your host, copy the bzImage kernel you created (in step 2 of Network Boot the Kernel on page 20) to /root. On the EPC-6320/21 terminal, copy this image to /mnt/boot. 4. Change the current /root to the mounted drive by entering this command: chroot /mnt 5.
A. Install two IDE hard drives on the carrier card. Ensure that the slave hard drive has VXSYS.COM, BOOTROM.SYS, and vxWorks.st installed on it. B. Power up the EPC-6320/21 and configure the system to boot to the slave hard drive.
VxWorks standalone image (contains vxWorks image and symbol table) Bootrom_uncmp VxWorks boot ROM 4. Start VxWorks: A. Boot the EPC-6320/21 system. Note The default is to boot from “ata0”, which is the master hard drive. When the bootloader runs, a countdown displays.
® -6320/21 Operating System Installation H A R D W A R E R E F E R E N C E host epc6320{ hardware ethernet 00:00:50:0D:60:B4; fixed-address 10.100.4.59; option root-path "/tftpboot"; option root-path "/target"; filename "pxelinux.0"; host epc6320a{ hardware ethernet 00:00:50:14:08:D8; fixed-address 10.100.4.59;...
CMOS Save & Restore Sub-Menu .....................45 The EPC-6320/21 uses the Phoenix NuBIOS to configure and select various system options. This chapter details the various menus and sub-menus used to configure the system. This chapter is written as though you are setting up each field in sequence and for the first time.
To enter Setup, press the F2 key when prompted. Note To view BIOS setup screens, the EPC-6320/21 must be attached to a terminal. Menu Map You set up the BIOS by making selections from the menus shown in the next table.
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Main Setup Menu Figure 4-1. BIOS Main Setup Menu PhoenixBIOS Setup Utility Main Advanced Boot Exit System Time: [16:17:18] Item Specific Help System Date: [01/01/2002]...
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Primary Master/Slave Sub-Menus There are two IDE adapter sub-menus for the primary hard disk controllers: a master and slave drive menu. Access this screen to: •...
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• 1–39: Select this option to specify a pre-determined hard-disk drive type. These drive types, found in the FDPT (Fixed Disk Parameter Table), are seldom used. RadiSys recommends that you avoid using this option. Note: For disks not supplied, consult the product documentation.
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® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Field Description Multi-Sector Transfers Allows the System BIOS to read ahead by the specified number of sectors during disk access. This has the effect of reading more data at once to reduce the absolute number of discrete disk reads performed by the operating system, which may increase system performance.
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® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Field Description Ultra DMA Mode Selects the Ultra DMA Mode that the System BIOS uses to access the hard disk. You can select one of these: •...
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Advanced Menu This menu contains settings for integrated peripherals, memory shadow, cache, and large disk access mode. You access this menu by selecting Advanced from the Main BIOS Setup menu.
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® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Field Description I/O Device Configuration Displays a menu that you use to configure peripheral devices. For Sub-Menu more information, see I/O Device Configuration Sub-Menu page 41.
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E PCI Configuration Sub-Menu Use the options in this sub-menu to control the exclusion of the UMB region for PCI or ISA and the exclusion of the IRQs for PCI or ISA.
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E PrPMC Customizations Sub-Menu Options in this menu customize PrPMC options. Figure 4-4. PrPMC Customizations Sub-Menu PhoenixBIOS Setup Utility Main Advanced PrPMC Customizations Item Specific Help...
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E PCI/PNP ISA UMB Region Exclusion Sub-Menu The PCI/PNP ISA UMB Region Exclusion Sub-Menu controls the exclusion of PCI and ISA UMB regions.
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E PCI/PNP ISA IRQ Resource Exclusion Sub-Menu The PCI/PNP ISA IRQ Resource Exclusion Sub-Menu controls the exclusion of PCI and ISA interrupt regions.
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Console Redirection Sub-Menu Options in this menu configure console redirection. Figure 4-7. Console Redirection Sub-Menu PhoenixBIOS Setup Utility Main Advanced Console Redirection Item Specific Help...
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® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Field Description Console connection Specifies how the console connects to the system. You can select one of these: • Direct (default): Connects the console directly to the system. •...
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E I/O Device Configuration Sub-Menu Use the options in this sub-menu to configure the onboard serial disk controller. Figure 4-8. I/O Device Configuration Sub-Menu PhoenixBIOS Setup Utility Main Advanced...
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Boot Menu The Boot menu: • Specifies the order in which the system tries to boot from devices attached to the system.
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® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Field Description Boot order Determines the boot order of boot devices. This is the default boot order: 1. Removable Devices 2.
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E Exit Menu Use the options in this menu to save and exit, or abandon your changes and exit to the system.
® -6320/21 BIOS Configuration H A R D W A R E R E F E R E N C E CMOS Save & Restore Sub-Menu Use the options in this menu to save, restore, or erase CMOS settings in the FBD (Flash Boot Device).
........................49 Power and Reset..........................54 The EPC-6320/21 has an Intel Tualatin 512 K LV microprocessor with a maximum 933 MHz core frequency. The RadiSys 82600 chipset provides the memory, LPCI (Local PCI) and BPCI (Backplane PCI), plus IDE, I C, and serial port interfaces.
The EPC-6320/21 has a CPU, clock generator, 82600 chipset, memory module, flash with BIOS, Ethernet, power and reset circuitry. The EPC-6320/21 is designed around the Intel Tualatin 512K LV processor in the micro-FCBGA package, using Intel’s advanced 0.13-micron process technology with copper interconnect.
The default is to have spread spectrum enabled. All clock lengths are carefully routed to minimize EMI and to produce exactly the appropriate amount of skew for the design. The EPC-6320/21 supports only 100 MHz or 133 MHz processor and memory clock rates.
H A R D W A R E R E F E R E N C E The RadiSys 82600 The 82600, a highly integrated chipset, replaces these components in an embedded Intel Architecture I/O system: North Bridge, South Bridge, PCI-to-PCI Bridge and Super I/O.
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® -6320/21 Theory of Operation H A R D W A R E R E F E R E N C E Power-up configuration: The following 82600 configuration options are determined during a power reset using pull-up or pull-down resistors on memory address lines. ADDR0: Selection of general purpose I/O pins or the EIDE bus.
• Interrupt acknowledge. Memory Subsystem: The EPC-6320/21 supports either 512 MB or 1GB of 133 MHz ECC custom memory modules on the main board. This discrete module connects through a set of low-profile connectors and provides all SDRAM to the EPC-6320/21.
PCI address/data line to connect. Local PCI Bus (Bus 0) The EPC-6320/21 implements a 3.3V, 32-bit primary PCI bus, which runs at 33 or 66 MHz and has the RadiSys 82600 chipset as the central resource. The primary PCI bus has one peripheral device connected to it, an Intel 82546GB dual gigabit Ethernet controller.
Backplane PCI bus (Bus 1) The EPC-6320/21 implements a +3.3V, 32-bit backplane PCI bus. The bus runs at 33 or 66 MHz and, when configured as a Monarch, has the RadiSys 82600 chipset as the central resource. The CPU board supports a backplane via standard Jn1 and Jn2 PMC connectors.
Jn2–9 and Jn4–1 = 10 pins +3.3V: 4.5A maximum. • Additional power pins on the Jn4 connector are provided only on the EPC-6320 and EPC-6320N. • This data is preliminary and subject to change. This table includes the power requirements for the 1GB memory SDRAM module.
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® -6320/21 Theory of Operation H A R D W A R E R E F E R E N C E Power to CPU V +1.15V and Vcct +1.25V are supplied by a Linear Technologies CORE LTC1703 dual synchronous switching regulator along with external FETs. The LTC1703’s five voltage identification inputs are programmed with resistors to set output voltage to +1.15V.
Message Codes This appendix lists the Phoenix BIOS 4.06 standard POST error codes which can generate console messages Class Number Name Disk errors 200h ERR_DISK_FAILED Keyboard errors 210h ERR_KBD_STUCK 211h ERR_KBD_FAILED 212h ERR_KBD_KCFAIL 213h ERR_KBD_LOCKED Video errors 220h ERR_VIDEO_SWITCH 230h ERR_SYS_MEM_FAIL Memory errors 231h...
...............................63 Null-Modem Serial Cable............................63 LEDs....................................64 This appendix details the connectors used by the EPC-6320/21 and gives the signal pinout of each connector. Connector Locations The next figure shows the locations of connectors on the EPC-6320/21: Figure C-1. EPC-6320: Connectors...
® -6320/21 Connectors H A R D W A R E R E F E R E N C E PMC Connectors Jn1 connector Table C-1. Jn1 Connector Pin Definitions Signal Signal TCK/NC –12V/NC ~INTA ~INTB ~INTC Present ~INTD PCI-Reserved/NC +3.3V PCICLK ~GNT0...
® -6320/21 Connectors H A R D W A R E R E F E R E N C E Jn2 Connector Table C-2. Jn2 Connector Pin Definitions Signal Signal +12V/NC ~TRST/NC TMS/NC TDO/NC TDI/NC PCI-Reserved/NC PCI-Reserved/NC PCI-Reserved/NC +3.3V ~RST +3.3V ~PME/NC AD[30]...
® -6320/21 Connectors H A R D W A R E R E F E R E N C E Jn4 Connector Table C-3. EPC-6320 Optional JN4 Connector Pin Definitions Signal Signal IDE:~RST IDE:D8 IDE:D7 IDE:D9 IDE:D6 IDE:D10 IDE:D5 IDE:D11...
® -6320/21 Connectors H A R D W A R E R E F E R E N C E Table C-4. EPC-6321 Optional JN4 Connector Pin Definitions Signal Signal CHA_MDI0+ CHA_MDI2+ CHA_MDI0– CHA_MDI2– CHA_MDI1+ CHA_MDI3+ CHA_MDI1– CHA_MDI3– CHB_MDI0+ CHB_MDI2+ CHB_MDI0–...
BIOS. Table C-6. 3-Pin Connector Pin Definitions Signal COM1–TXD COM1—RXD Null-Modem Serial Cable RadiSys does not supply the serial cable. To assemble the cable, you will need the following: Item Part number 3 pin connector Molex receptacle 51021-0300...
® -6320/21 Connectors H A R D W A R E R E F E R E N C E EPC-6320/21 Host Molex termination pin 8–16 inches cable RS232 female DB-9 Molex housing with connector LRamp * Closest to (PN 50058-8100)
Error Messages Upon encountering the following error conditions, the System BIOS tries to display a message to the console, then halts: 1. Fixed disk errors • No drive connected • Configured for 0 cylinders • Controller reset failed • Drive not ready •...
Using phlash.exe to Re-Program the Flash Chip ....................70 This appendix details how to update or recover your Flash Boot Device (FBD). You accomplish this by re-programming all or part of the EPC-6320/21’s flash chip. About the Flash Chip The EPC-6320/21 flash chip contains these major sections: Figure F-1.
Minimum 2 MB of DRAM to run the re-flash program. • A 3.5" 1.44 MB hard drive attached to or installed in the system. • Access to the RadiSys web site. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
To create the Flash Boot image on a hard drive: 1. Locate this file from the RadiSys web site and download it to your computer: fbdrec.zip 2. Unzip the contents to a directory on your hard drive.
H A R D W A R E R E F E R E N C E Using phlash.exe to Re-Program the Flash Chip 1. Boot the EPC-6320/21 into MS-DOS with no memory managers running. 2. Copy the Flash Boot image to the system. Note...
Leave all reserve pins unconnected. The PCI:~RST signal is an input to the PrPMC. It should be driven by an open collector device and it requires a pullup (1K to +5V) for the EPC-6320/21 to operate properly. Power The EPC-6320/21 includes the following power considerations: +5V, +3.3V, +12V, –12V, and VI/O.
~SERIRQ signal through a resistor to VI/O. RadiSys-Defined PrPMC Connector (Jn4) Note The Jn4 pinout of the EPC-6320 and EPC-6321 differ. For details, see Jn4 Connector on page 61. RadiSys recommends placing series termination resistors (33.2 Ohms) next to all IDE signals on Jn4, with the exception of the ~IOR, IORDY and ~RST signals.
Ensure that the power supplies on the carrier card can support the full amount of current. Also, when possible, to keep the EPC-6320/21 as cool as possible, avoid placing high power dissipation components in the vicinity of the PMC.
R E F E R E N C E Airflow Place the EPC-6320/21 in a pressurized chassis pushing air across the card. The required airflow should be 200 LFM at the carrier card. Airflow direction should be from the CPU/memory edge to the RadiSys 82600 chipset edge.
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® -6320/21 Carrier Card Design H A R D W A R E R E F E R E N C E Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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® -6320/21 Carrier Card Design H A R D W A R E R E F E R E N C E Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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® -6320/21 Carrier Card Design H A R D W A R E R E F E R E N C E Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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® -6320/21 Carrier Card Design H A R D W A R E R E F E R E N C E Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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® -6320/21 Carrier Card Design H A R D W A R E R E F E R E N C E Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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® -6320/21 Carrier Card Design H A R D W A R E R E F E R E N C E Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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® -6320/21 Carrier Card Design H A R D W A R E R E F E R E N C E Shield PMC SITE Shield Shield PMC SITE Shield Shield PMC SITE Shield Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
Jumpers......................85 Interrrupts ............................86 The EPC-6320/21 test board (hereafter, Test Board) is a full ATX-sized, 4fourPMC site circuit board that you can use to begin production, test, and early development using the RadiSys EPC-6320/21 PrPMC. This product assumes an intimate knowledge of the PrPMC specification, the standards governing other external interfaces to the PrPMC, and basic computer knowledge.
Pushbutton switch and one three pin jumper for reset. — 3-pin jumper for arbitration selection. Note: The only available arbitration selection is that the Test Board provides arbitration. If this presents a problem, contact RadiSys as described on Where to get More Information on page 2.
® -6320/21 EPC-6320/21 Test Board H A R D W A R E R E F E R E N C E Block diagram Figure H-1. Block Diagram: Test Board Slot 3: Slot 1 Slot 2 33/66MHz KB, mouse, serial...
® -6320/21 EPC-6320/21 Test Board H A R D W A R E R E F E R E N C E Table H-2. Connector and Jumper Descriptions Item Description Pushbutton reset (RadiSys only) J30, J31 Reset (1–2 reset, 2–3 no reset) PCI bus V I/O (1–2 +5V, 2–3 +3.3V)
Glossary access time A factor in measurement of a memory storage device’s operating speed. It is the amount of time required to perform a read operation. More specifically, it is the period of time between which the memory receives a read command signal and the time when the requested data becomes available to the system data bus.
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® -6320/21 Glossary H A R D W A R E R E F E R E N C E boot The process of starting a computer and loading the operating system from a powered down state (cold boot) or after a computer reset (warm boot). Before the operating system loads, the computer performs a general hardware initialization and resets internal registers.
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® -6320/21 Glossary H A R D W A R E R E F E R E N C E DRAM. (Dynamic Random Access Memory) Semiconductor RAM memory devices in which the stored data does not remain permanently stored, even with the power applied, unless the data are periodically rewritten into memory during a refresh operation.
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® -6320/21 Glossary H A R D W A R E R E F E R E N C E GB or GByte (Gigabyte) Approximately one billion (US) or one thousand million (Great Britain) bytes. 2^30 = 1,073,741,824 bytes exactly. (Hexadecimal) A base-16 numbering system using numeric symbols 0 through 9 plus alpha characters A, B, C, D, E, and F as the 16 digit symbols.
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® -6320/21 Glossary H A R D W A R E R E F E R E N C E cylinders, heads, or sectors. LBA can be used only on hard disk drives designed to support it. The memory-mapped location of a segment after application of the address offset to logical address the physical address.
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® -6320/21 Glossary H A R D W A R E R E F E R E N C E or detector, a low pass filter, and a voltage controlled oscillator which function together to capture and lock onto an input frequency. When locked onto the input frequency, the PLL can maintain a stable, regulated output frequency (within bounds) despite frequency variance at the input.
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® -6320/21 Glossary H A R D W A R E R E F E R E N C E Technically, a ROM can be written to (programmed) only once, and this operation is normally performed at the factory. Thereafter, information can be read from the memory indefinitely.
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® -6320/21 Glossary H A R D W A R E R E F E R E N C E TB or TByte (Terabyte) Approximately one thousand billion (US) or one billion (Great Britain) bytes. 2^40 = 1,099,511,627,776 bytes exactly. (User Editable Drive) A feature of the NY1210’s Phoenix NuBIOS.
Dynamic Random Access Memory (DRAM), defined recovery, defined setup main menu update, defined bios.rom file EDO DRAMs, defined board electrostatic discharge, avoiding features e-mail address, RadiSys connectors EPC-6315 front panel disconnecting from carrier card installing boot ESCD block device, defined...
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EPC-6315 Power-On Self Test (POST) interrupt defined mapping assignments Power-On Self-Test (POST) request (IRQ), defined Primary Slave sub-menu Jn1 connector RadiSys, contacting Jn2 connector RAM, defined Jn4 connector Random Access Memory (RAM), defined jumpers README file defined readme.txt file...
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UED, term defined updates BIOS, defined flash, defined URLs Intel MontaVista RadiSys WindRiver User Editable Drive (UED), defined defined World-Wide Web URLs Intel MontaVista RadiSys WindRiver Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
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