Printronix P6000 Series Maintenance Manual page 41

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2-6. Logic C3 PCBA
f. Expansion Connector (J5)
Access is provided to the MC68000 microprocessor bus via an expansion connector located on the
logic circuit card.
The bus expansion mating connector is a 64-pin Cannon Part Number G06M64P3BLBL or
equivalent with signals assigned as shown in Table 2-5.
Table 2-5. Microprocessor Bus Expansion Connector Pin Assignment
Pin Mnemonic
1B NBDS
2B NDTEXD(O)
3B BA3
4B BD9
5B BD11
6B BA4
7B NBUDS
8B NCIACK
9B BSN6
10B NBLDS
11B BD13
12B NBERR(O)
13B BSN4
14B BA5
15B BD8
16B BD10
17B BA2
18B BA13
19B BD12
20B BD7
21B BA12
22B BA10
23B BA14
24B BA16
25B BA18
26B BA20
27B BD2
28B BA23
29B BA22
30B IPL2(O)
31B BD4
32B GND
P6040/P6080 Principles of Operation
-
continued
Description
Data Strobe Enabled from Address Decode
(4008C)
DTACK Extended (Wait) CPU Input
Buffered Address Bus Line #3
Buffered Data Bus Line #9
Buffered Data Bus Line #11
Buffered Address Bus Line #4
Buffered Upper Data Strobe from CPU
Vectored Interrupt Acknowledge from CPU
Segment Line #6
Buffered Lower Data Strobe from CPU
Buffered Data Bus Line #13
Bus Error Input to CPU
Segment Line #4
Buffered Address Bus Line #5
Buffered Data Bus Line #8
Buffered Data Bus Line #10
Buffered Address Bus Line #2
Buffered Address Bus Line #13
Buffered Data Bus Line #12
Buffered Data Bus Line #7
Buffered Address Bus Line #12
Buffered Address Bus Line #10
Buffered Address Bus Line #14
Buffered Address Bus Line #16
Buffered Address Bus Line #18
Buffered Address Bus Line #20
Buffered Data Bus Line #2
Buffered Address Bus Line #23
Buffered Address Bus Line #22
Interrupt Priority Level 2 to CPU
Buffered Data Bus Line #4
Signal Ground
Continued
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