Digital-To-Analog Converter; Figure 5-3. Voltage Reference (Schematic) - Texas Instruments ADS1285EVM-PDK User Manual

Digital-to-Analog Converter

Figure 5-3 shows a schematic of the voltage reference.
AVDD1
C25
1µF
J11
1 AVSS
REF62xx EN 2
R40
R41
130k
10.0k
C28
1µF
AVSS AVSS AVSS
The power supply for each active component on the EVM is bypassed with a ceramic capacitor placed close
to that component. Additionally, the EVM layout uses thick traces or large copper fill areas, where possible,
between bypass capacitors and their loads to minimize inductance along the load current path.
As mentioned previously in
information about PHI pins and the power connections, see
With modifications, the user can use external supplies for any voltage supplies. Using the ADC PWR header
(J26), DAC PWR header (J1), and the unipolar or bipolar select (J4); the shunts can be depopulated for direct
access to the AVDD1, AVDD2, AVSS+5V, DVDD, and AVSS pins.
6 Digital-to-Analog Converter
The ADS1282EVM-PDK contains a DAC1282, which is a fully integrated digital-to-analog converter (DAC) that
provides a low-distortion, digital-synthesized voltage output designed for testing seismic equipment and the
ADS128x family of devices; see the
combination with the GUI to directly supply an input voltage for testing and performance purposes. For more
information on configuring the inputs to use the DAC1282, see
If using the DAC in Sine mode, the output frequency is programmable from 0.5 Hz to 250 Hz and the magnitude
is scaled by both analog and digital control. The analog gain is adjustable in 6-dB steps and the digital gain in
0.5-dB steps. The analog gain settings match those of the ADS1282 for testing at all gains with high resolution.
Controlling the settings of the DAC1282 can be done on the DAC Configuration page of the GUI as explained in
Section 8.6.
The DAC1282 uses AVSS+5V and DVDD for the power supplies and shares the same reference as the
ADS1285. This configuration minimizes potential errors from using separate references between the devices.
However, most of the DAC1282 documentation is in reference to a 5-V supply where the ADS1285EVM-PDK
uses a 4.096-V reference by default. As a result, the DAC output amplitude is scaled in reference to the 4.096-V
reference through the following equation:
V = V
out_peak FSR_peak
where:
• V = Output amplitude of the DAC in Sine mode
out_peak
• V = Positive peak of the full-scale range calculation, which depends on voltage reference
FSR_peak
• G = Digital gain of the DAC determined by the SINEG register
DAC_Dig(dB)
This equation and scaling is automatically calculated in the ADS1285EVM-PDK GUI; see
12 ADS1285EVM-PDK Evaluation Module
On-board references
U8
R37
1 6
VIN OUT_F
0.22
2 5
EN OUT_S
3 8
SS GND_S
4 7
FILT GND_F
REF6241IDGKR
AVSS
Reference options
REF6250 supply range: 5.3 - 5.5V
REF6241 supply range: 4.35 - 5.5V
REF6225 supply range: 3 - 5.5V

Figure 5-3. Voltage Reference (Schematic)

Section 1, power to the EVM is supplied by the PHI through connector J5. For
DAC1282 data sheet
G DAC_Dig dB
∙ 10
20
Copyright © 2022 Texas Instruments Incorporated
R38
0
R39
0.22
C26
0.01uF
C27
22µF
R42
0
Table 4-1.
for more information. The DAC1282 can be used in
Section 3.1.
SBAU394A – APRIL 2022 – REVISED SEPTEMBER 2022
www.ti.com
+ -
Header for measuring reference voltage or
connecting to an external reference source
J10
NOTE: This reference voltage is shared between
the ADS1285 and DAC1282
VREFP
Connects to 'DC127_ADC' and 'DC127_DAC' pages
VREFN
Route REFP/REFN as differential
pair, and only connect REFN to
AVSS near the reference source(s).
(1)
Section 8.6.
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