Analog Devices ADSP-BF561 EZ-KIT Lite Manual page 91

Evaluation system
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A
All USB interface circuitry is considered propreitary andh has
been omitted from this schematic
When designin your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
1
2
3
4
A
B
3.3V
USB_TMS
USB_TCK
USB_TRST
R239
R241
10K
10K
805
805
USB_TDI
P4
1
2
3
4
5
6
7
8
9
10
EMULATOR_EMU
11
12
USB_EMU
13
14
EMULATOR_TDO
IDC7X2
USB_TDO
7X2
DSP JTAG HEADER
B
C
U36
EMULATOR_TMS
2
4
I0A
YA
3
I1A
EMULATOR_TCK
5
7
I0B
YB
6
I1B
EMULATOR_TRST
11
9
I0C
YC
10
I1C
EMULATOR_TDI
14
12
I0D
YD
13
I1D
1
S
15
E
3.3V
ADG774A
QSOP16
R201
10K
805
U37
2
4
I0A
YA
3
I1A
5
7
I0B
YB
6
I1B
11
9
I0C
YC
10
I1C
14
12
I0D
YD
13
I1D
1
S
15
E
ADG774A
QSOP16
3.3V
3.3V
C196
C195
0.1UF
0.1UF
402
402
12.288MHz
ADG774A
Approvals
Drawn
Checked
Engineering
C
TMS
R87
0.00
805
TCK
TRST
TDI
EMU
TDO
3.3V
C209
0.1UF
402
ADG774A
ANALOG
DEVICES
Title
Date
ADSP-BF561 EZ-KIT LITE:
JSZ
10/10/03
Size
Board No.
A0185-2003
C
Date
12-11-2003_13:22
D
1
2
3
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
DEBUG AGENT - JTAG
Rev
1.3A
Sheet
15
of
18
D

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